MC68360CVR25L Freescale Semiconductor, MC68360CVR25L Datasheet - Page 779
MC68360CVR25L
Manufacturer Part Number
MC68360CVR25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360CVR25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Applications
9.6.3 Logical Interface
Communicating across the SCSI bus occurs through a series of phases. The protocol is
made up of communication cycles, where each cycle is a sequence of states and the bus
can never be in more than one state at a time. The protocol has eight phases, and each
phase performs a specific function, such as idling, arbitrating, selecting, reselecting, and
sending commands, data, messages, and status. From a hardware perspective, each phase
is determined by the SCSI bus control lines. Figure 9-20, a phase sequence diagram, shows
how the phases fit together to form the communication cycle. Some phases, such as arbi-
tration, reselection, and message out, are optional. They are used when the bus has multiple
initiators. The following list describes the different phases:
9-59
BUS-FREE—the idling state of the SCSI bus. When in this state, no SCSI device is ac-
tively using the bus, and the bus is available for subsequent users.
ARBITRATION—used to determine which device gains control of the SCSI bus. Arbitra-
tion is necessary when two or more devices are simultaneously competing to use the bus.
SELECTION—used to establish a communications link between an initiator and a target
device to perform a SCSI command. Typically, the command is a read or write function to
the target.
RESELECTION—optional phase controlled by the target. This phase allows the target to
reconnect to an initiator so that an operation that was previously started by the initiator,
but suspended by the target, can be finished.
INFORMATION-TRANSFER—includes command, data, status, and message phases.
They are entered by asserting the BSY line and negating the SEL line. The C/D, I/O, and
MSG signals are used to differentiate between the phases.
Command—allows the target to receive a command from the initiator in the form of a
command-descriptor block (CDB). It is used to tell the target which type of operation to
perform (e.g., read/write a sector from a disk). CDBs are usually 6, 10, or 12 bytes in
length.
Data—two phases: data in and data out (direction is determined by the originator). The
data phase is entered when the target negates the C/D and MSG lines and asserts (in-
put) or negates (output) the I/O line.
Message—similar to the data phase because it can be message in or message out. It
conveys information on the status of a command and is entered when the target asserts
the C/D and MSG lines during REQ and ACK handshakes. I/O has the same function
as in the data phase.
Status—used to send one status byte from the target to the initiator. This phase falls
between the data and message phases and consists of sending a good status byte if
the data transmitted was received correctly. The status phase is entered when the tar-
get asserts the C/D and I/O lines while MSG is negated.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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