EZ80190AZ050EG Zilog, EZ80190AZ050EG Datasheet - Page 209

• Manufacturer Part Number: EZ80190AZ050EG
• Description: IC WEBSERVER 50MHZ XTEMP 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050EG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80190x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3865; EZ80190AZ050EG

automatic reload 35, 36, 37, 38
B
Baud Rate Generator 63
Baud Rate Generator Functional Descrip-
tion 63
Baud Rate Generator output 63
bidirectional serial protocol 148
BI—see Break condition 80
BI—see Break Indication 80
bit generation and detection, parity 67
bit generation and detection, start 67
bit generation and detection, stop 67
Bit Manipulation Instructions 167
block data transfer 140
Block Diagram 2
Block Transfer and Compare Instructions
168
Break Indication 70, 80
break signal 69, 77
BRG 63
BRG clock 69
BRG clock divisor ratio 65
BRG counter 63, 64, 65
BRG Divisor Latch 63, 64, 65
BRG Divisor Latch registers 63
BRG Divisor Latch Registers—High Byte
65
BRG Divisor Latch Registers—Low Byte 64
BRG divisor registers 63
BRG divisor value 63, 64, 65, 66
BRG output frequency 63
BRGx 63
BRGx_DLR_H 63, 64, 65
BRGx_DLR_H register 74
BRGx_DLR_L 63, 64, 65
BRGx_DLR_L register 65, 73
BURST mode 140, 141, 142, 145
bus arbitration 92, 96
Bus Arbitration Overview 92
PS006614-1208
Bus Clock Speed 111
Bus Enable bit 107
bus request signal 22
BUSACK 20
BUSREQ 20, 22
Byte Format 93
byte transfer 92, 93, 97
byte transfer, cycle-steal 142
C
C register 116
CALC Bank 118
CALC bank 114, 116, 117, 119, 121, 124, 127,
134, 135
calc_stat field 117
CGE bit 103
Characteristics, electrical
Chip Select Registers 55
Chip Select signal 51, 56, 57
Chip Select signals, external 60
Chip Select x Lower Bound Register 55
Chip Select x Upper Bound Register 56
Chip Select/Wait State Generator block 6,
7, 8, 9, 10
Chip Select/Wait State Generator, Regis-
ter Map 25
Chip Selects, external I/O 23
Chip Selects, I/O 50, 53, 55, 56
Chip Selects, Memory 50
Clear to Send 16, 19, 82
Clear to Send, Delta Status Change of 82
Clock Divider 34
clock divider 35, 85, 111
clock divider ratio 32
clock frequency 32
clock frequency, 16X 71
clock frequency, 50-MHz external 197
clock frequency, eZ80 CPU 148
clock generator 62, 84
Absolute maximum ratings 180
Product Specification
Index
199