MPC8360EZUAJDGA Freescale Semiconductor, MPC8360EZUAJDGA Datasheet - Page 44

IC MPU POWERQUICC II PRO 740TBGA

MPC8360EZUAJDGA

Manufacturer Part Number
MPC8360EZUAJDGA
Description
IC MPU POWERQUICC II PRO 740TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8360EZUAJDGA

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
533MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
740-TBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8360E-RDK
Maximum Clock Frequency
533 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
For Use With
MPC8360EA-MDS-PB - KIT APPLICATION DEV 8360 SYSTEMMPC8360E-RDK - BOARD REFERENCE DESIGN FOR MPC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8360EZUAJDGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Local Bus
Figure 22
44
Local bus clock to output high impedance for LAD/LDP
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or rising edge of
3. All signals are measured from OV
4. Input timings are measured at the pin.
5. t
6. t
7. t
8. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
9. DLL bypass mode is not recommended for use at frequencies above 66 MHz.
inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock one (1). Also, t
the output (O) going invalid (X) or output hold time.
LCLK0 (for all other inputs).
signaling levels.
load on LAD output pins.
on LAD output pins.
pins.
through the component pin is less than or equal to the leakage current specification.
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
LBOTOT1
LBOTOT2
LBOTOT3
provides the AC test load for the local bus.
should be used when RCWH[LALE] is not set and when the load on LALE output pin is at least 10 pF less than the
should be used when RCWH[LALE] is set and when the load on LALE output pin is at least 10 pF less than the load
should be used when RCWH[LALE] is set and when the load on LALE output pin equals to the load on LAD output
(first two letters of functional block)(reference)(state)(signal)(state)
Table 41. Local Bus General Timing Parameters—DLL Bypass Mode (continued)
LBKHOX
Parameter
Output
symbolizes local bus timing (LB) for the t
DD
/2 of the rising/falling edge of LCLK0 to 0.4 × OV
Figure 22. Local Bus C Test Load
Z
0
= 50 Ω
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
Symbol
t
LBKHOZ
LBK
LBK
clock reference (K) to go high (H), with respect to
R
clock reference (K) goes high (H), in this case for
1
L
= 50 Ω
Min
DD
of the signal in question for 3.3-V
OV
LBIXKH1
DD
/2
Max
4
Freescale Semiconductor
symbolizes local bus
Unit
ns
Notes
for

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