MPC8315ECVRAGDA Freescale Semiconductor, MPC8315ECVRAGDA Datasheet - Page 32

• Manufacturer Part Number: MPC8315ECVRAGDA
• Description: MPU POWERQUICC II PRO 620-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8315ECVRAGDA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Ethernet: Three-Speed Ethernet, MII Management
9.3.2
Table 31
32
At recommended operating conditions with LVDD is 3.3 V ± 300 mv
Input high current
Input low current
Note:
1. Note that the symbol V
MDC frequency
MDC period
MDC clock pulse width high
MDC to MDIO delay
MDIO to MDC setup time
MDIO to MDC hold time
MDC rise time
MDC fall time
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. This parameter is dependent on the csb_clk speed (that is, for a csb_clk of 133 MHz, the maximum frequency is 4.16 MHz
3. This parameter is dependent on the csb_clk speed (that is, for a csb_clk of 133 MHz, the delay is 60 ns).
for inputs and t
management data timing (MD) for the time t
hold time. Also, t
valid state (V) relative to the t
latter convention is used with the appropriate letter: R (rise) or F (fall).
and the minimum frequency is 0.593 MHz).
provides the MII management AC timing specifications.
Table 30. MII Management DC Electrical Characteristics Powered at 3.3 V (continued)
Parameter
Parameter/Condition
MII Management AC Electrical Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
MDDVKH
MPC8315E PowerQUICC
IN
, in this case, represents the NV
symbolizes management data timing (MD) with respect to the time data input signals (D) reach the
MDC
Table 31. MII Management AC Timing Specifications
clock reference (K) going to the high (H) state or setup time. For rise and fall times, the
Symbol
I
I
IH
IL
MDC
™
from clock reference (K) high (H) until data outputs (D) are invalid (X) or data
II Pro Processor Hardware Specifications, Rev. 0
NVDD = Max
NVDD = Max
Symbol
t
t
t
MDKHDX
MDDXKH
MDDVKH
t
t
t
MDCH
MDCR
f
t
MDHF
MDC
MDC
IN
Conditions
symbol referenced in
1
V
V
IN
IN
Min
for outputs. For example, t
32
10
—
—
—
—
1
5
0
(first two letters of functional block)(signal)(state)(reference)(state)
= 0.5 V
= 2.1 V
Table 1
Typ
400
2.5
—
—
—
—
—
—
–600
Min
—
and
Table
Max
170
10
10
—
—
—
—
—
MDKHDX
Freescale Semiconductor
2.
Max
symbolizes
40
—
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
Notes
Unit
μA
μA
—
—
—
—
—
—
2
3