MC68060RC50 Freescale Semiconductor, MC68060RC50 Datasheet - Page 46

• Manufacturer Part Number: MC68060RC50
• Description: IC MPU 32BIT 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Introduction
1-22
#<xxx> or #<data>
{offset:width}
SCALE
<label>
B, W, L
Rx, Ry
<fmt>
MSW
<list>
SIZE
<ea>
LSW
MSB
+ inf
– inf
LSB
m–n
FC
UB
Rn
Xn
LB
bd
d n
od
( )
cc
—
[ ]
m
D
P
S
X
C
N
U
V
X
Z
k
*
Any Address or Data Register
Any source and destination registers, respectively.
Index Register—An, Dn, or suppressed.
Positive Infinity
Operand Data Format: Byte (B), Word (W), Long (L), Single (S), Double (D), Extended (X), or
Packed (P).
Specifies a signed integer data type (twos complement) of byte, word, or long word.
Double-precision real data format (64 bits).
A twos complement signed integer (–64 to +17) specifying a number’s format to be stored in the
packed decimal format.
Packed BCD real data format (96 bits, 12 bytes).
Single-precision real data format (32 bits).
Extended-precision real data format (96 bits, 16 bits unused).
Negative Infinity
Immediate data following the instruction word(s).
Identifies an indirect address in a register.
Identifies an indirect address in memory.
Base Displacement
Displacement Value, n Bits Wide (example: d 16 is a 16-bit displacement).
Least Significant Bit
Least Significant Word
Most Significant Bit
Most Significant Word
Outer Displacement
A scale factor (1, 2, 4, or 8, for no-word, word, long-word, or quad-word scaling, respectively).
The index register’s size (W for word, L for long word).
Bit field selection.
General Case.
Carry Bit in CCR
Condition Codes from CCR
Function Code
Negative Bit in CCR
Undefined, Reserved for Motorola Use.
Overflow Bit in CCR
Extend Bit in CCR
Zero Bit in CCR
Not Affected or Applicable.
Effective Address
Assemble Program Label
List of registers, for example D3–D0.
Lower Bound
Bit m of an Operand
Bits m through n of Operand
Upper Bound
Table 1-4. Notational Conventions (Continued)
M68060 USER’S MANUAL
Subfields and Qualifiers
Data Format and Type
Register Codes
Miscellaneous
MOTOROLA