XC5VLX30-3FF324C Xilinx Inc, XC5VLX30-3FF324C Datasheet - Page 282
![IC FPGA VIRTEX-5 30K 324FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX30-3FF324C
Manufacturer Part Number
XC5VLX30-3FF324C
Description
IC FPGA VIRTEX-5 30K 324FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX30-3FF324C
Number Of Logic Elements/cells
30720
Number Of Labs/clbs
2400
Total Ram Bits
1179648
Number Of I /o
220
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-BBGA, FCBGA
For Use With
HW-AFX-FF324-500-G - BOARD DEV VIRTEX 5 FF324
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Chapter 6: SelectIO Resources
X-Ref Target - Figure 6-73
X-Ref Target - Figure 6-74
282
DIFF_SSTL2_II_DCI
DIFF_SSTL2_II_DCI
External Termination
DIFF_SSTL2_II
DIFF_SSTL2_II
DIFF_SSTL2_II
R 0 = 25
R 0 = 25
DCI
Ω
Ω
Figure 6-73: Differential SSTL2 (2.5V) Class II Unidirectional DCI Termination
Figure 6-74: Differential SSTL2 (2.5V) Class II with Bidirectional Termination
+
–
V
V
CCO
CCO
Figure 6-73
differential SSTL2 Class II (2.5V) with unidirectional DCI termination.
Figure 6-74
differential SSTL2 Class II (2.5V) with bidirectional termination.
= 2.5V
= 2.5V
2R
2R
2R
2R
IOB
IOB
VRP
VRN
VRP
VRN
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
shows a sample circuit illustrating a valid termination technique for
shows a sample circuit illustrating a valid termination technique for
25Ω
25Ω
V
V
TT
TT
= 1.25V
= 1.25V
www.xilinx.com
50Ω
50Ω
Z 0
Z 0
Z 0
Z 0
V
V
50Ω
TT
TT
50Ω
= 1.25V
= 1.25V
IOB
V
V
CCO
CCO
2R
2R
2R
2R
= 2.5V
= 2.5V
VRP
VRN
VRP
VRN
25Ω
25Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
IOB
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DIFF_SSTL2_II_DCI
DIFF_SSTL2_II
DIFF_SSTL2_II
DIFF_SSTL2_II
ug190_6_70_071707
–
+
+
–
ug190_6_69_030506
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