EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 488
EP4SGX360FH29C3N
Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX360FH29C3N
Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number:
EP4SGX360FH29C3N
Manufacturer:
Bussmann
Quantity:
40 000
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Part Number:
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Manufacturer:
ALTERA21
Quantity:
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1–44
Stratix IV Device Handbook Volume 2: Transceivers
In a DC-coupled link, the transmitter DC V
Link V
off-chip receiver termination and biasing circuitry must ensure compatibility between
the transmitter and the receiver V
Figure 1–38. DC-Coupled Link
Note to
(1) The receiver termination and biasing can be on-chip or off-chip.
You might choose to use the DC-coupled high-speed link for these functional modes
only:
■
■
The following sections describe DC-coupling requirements for a high-speed link with
a Stratix IV GX device used as the transmitter, receiver, or both. Specifically, the
following link configurations are described:
■
■
■
■
Basic single- and double-width
(OIF) CEI PHY interface
Stratix IV GX Transmitter (PCML) to Stratix IV GX Receiver (PCML)
Stratix II GX Transmitter (PCML) to Stratix IV GX Receiver (PCML)
Stratix IV GX Transmitter (PCML) to Stratix II GX Receiver (PCML)
LVDS Transmitter to Stratix IV GX Receiver (PCML)
Figure
CM
DC-Coupled Links
Transmitter
depends on the transmitter V
1–38:
TX Termination
TX
V
CM
CM
Physical Medium
Physical Medium
.
Figure 1–38
CM
and the receiver V
CM
Chapter 1: Transceiver Architecture in Stratix IV Devices
is seen unblocked at the receiver buffer.
shows a DC-coupled link.
RX
V
CM
February 2011 Altera Corporation
CM
RX Termination
. The on-chip or
Transceiver Block Architecture
Receiver
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