EP4CGX110CF23I7 Altera, EP4CGX110CF23I7 Datasheet - Page 239
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EP4CGX110CF23I7
Manufacturer Part Number
EP4CGX110CF23I7
Description
IC CYCLONE IV FPGA 110K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CGX110CF23I7
Number Of Logic Elements/cells
109424
Number Of Labs/clbs
6839
Total Ram Bits
5490000
Number Of I /o
270
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Remote System Upgrade
Dedicated Remote System Upgrade Circuitry
Figure 8–33. Remote System Upgrade Circuit Data Path
Notes to
(1) The RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN,RU_nCONFIG, and RU_nRSTIMER signals are internally controlled
(2) The RU_CLK refers to the ALTREMOTE_UPDATE megafunction block "clock" input. For more information, refer to the
© December 2010 Altera Corporation
by the ALTREMOTE_UPDATE megafunction.
(ALTREMOTE_UPDATE) Megafunction User Guide.
Figure
Previous
State
Register 2
Bit[30..0]
8–33:
RU_DIN
Status Register (SR)
Previous
State
Register 1
Bit[30..0]
This section describes the implementation of the Cyclone IV device remote system
upgrade dedicated circuitry. The remote system upgrade circuitry is implemented in
hard logic. This dedicated circuitry interfaces with the user-defined factory
application configurations implemented in the Cyclone IV device logic array to
provide the complete remote configuration solution. The remote system upgrade
circuitry contains the remote system upgrade registers, a watchdog timer, and state
machines that control those components.
remote system upgrade block.
din
RU_SHIFTnLD
Bit [40..39]
Logic
Current
State
Logic
Bit[31..0]
Shift Register
RU_CAPTnUPDT
dout
din
Logic Array
Bit [38..0]
Update Register
Bit [38..0]
Control Register
Bit [38..0]
Logic
(Note 1)
clkout
capture
update
capture
dout
Logic
RU_CLK (2) RU_DOUT
clkin
update
Figure 8–33
RSU
Reconfiguration
State
Machine
RSU
Master
State
Machine
RU_nCONFIG
shows the data path of the
Cyclone IV Device Handbook, Volume 1
Internal Oscillator/
CLKUSR
timeout
RU_nRSTIMER
Remote Update Circuitry
User
Watchdog
Timer
8–73
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