EP2C5F256C8 Altera, EP2C5F256C8 Datasheet - Page 31

IC CYCLONE II FPGA 5K 256-FBGA

EP2C5F256C8

Manufacturer Part Number
EP2C5F256C8
Description
IC CYCLONE II FPGA 5K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C5F256C8

Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
158
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
158
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
No. Of Macrocells
4608
Family Type
Cyclone II
No. Of I/o's
158
Clock Management
PLL
I/o Supply Voltage
3.6V
Operating Frequency Max
320MHz
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1446

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0
Figure 2–12. EP2C15 & Larger PLL, CLK[], DPCLK[] & Clock Control Block Locations
Notes to
(1)
(2)
Altera Corporation
February 2007
There are four clock control blocks on each side.
Only one of the corner CDPCLK pins in each corner can feed the clock control block at a time. The other CDPCLK pins
can be used as general-purpose I/O pins.
CDPCLK0
CDPCLK1
CLK[3..0]
Figure
DPCLK0
DPCLK1
2–12:
4
PLL 3
PLL 1
4
3
CDPCLK7
CDPCLK2
(2)
(2)
Clock Control
DPCLK[11..10]
Block (1)
3
DPCLK[3..2]
4
GCLK[15..0]
2
16
2
CLK[15..12]
CLK[11..8]
16
16
4
4
GCLK[15..0]
16
DPCLK[9..8]
DPCLK[5..4]
2
2
Clock Control
Block (1)
3
4
Cyclone II Device Handbook, Volume 1
CDPCLK6
CDPCLK3
(2)
(2)
3
PLL 4
PLL 2
4
Cyclone II Architecture
4
CDPCLK5
DPCLK7
CLK[7..4]
DPCLK6
CDPCLK4
2–19

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