EP3C5F256C8N Altera, EP3C5F256C8N Datasheet - Page 242

• Manufacturer Part Number: EP3C5F256C8N
• Description: IC CYCLONE III FPGA 5K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C5F256C8N

• Number Of Logic Elements/cells: 5136
• Number Of Labs/clbs: 321
• Total Ram Bits: 423936
• Number Of I /o: 182
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• No. Of Logic Blocks: 321
• Family Type: Cyclone III
• No. Of I/o's: 182
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 402MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2423; EP3C5F256C8N

9–82
Dedicated Remote System Upgrade Circuitry
Cyclone III Device Handbook, Volume 1
This section explains the implementation of the Cyclone III device family remote
system upgrade dedicated circuitry. The remote system upgrade circuitry is
implemented in hard logic. This dedicated circuitry interfaces to the user-defined
factory application configurations implemented in the Cyclone III device family logic
array to provide the complete remote configuration solution. The remote system
upgrade circuitry contains the remote system upgrade registers, a watchdog timer,
and state machines that control those components.
the remote system upgrade block.
Figure 9–35. Remote System Upgrade Circuit Data Path
Notes to
(1) RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN,RU_nCONFIG, and RU_nRSTIMER signals
(2) RU_CLK refers to ALTREMOTE_UPDATE megafunction block "clock" input. For more information, refer to the
are internally controlled by the ALTREMOTE_UPDATE megafunction.
Remote Update Circuitry (ALTREMOTE_UPDATE) Megafunction User
Previous
State
Register 2
Bit[30..0]
Figure
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
RU_DIN
9–35:
Status Register (SR)
Previous
State
Register 1
Bit[30..0]
din
RU_SHIFTnLD
Bit [40..39]
Logic
Current
State
Logic
Bit[31..0]
Shift Register
RU_CAPTnUPDT
dout
din
Logic Array
Bit [38..0]
Update Register
Bit [38..0]
Control Register
Bit [38..0]
Logic
clkout
capture
update
capture
dout
Logic
RU_CLK (2)
clkin
update
(Note 1)
Figure 9–35
Guide.
RU_DOUT
© December 2009 Altera Corporation
Internal Oscillator
RSU
Reconfiguration
State
Machine
RSU
Master
State
Machine
RU_nCONFIG
shows the data path of
Remote System Upgrade
timeout
RU_nRSTIMER
User
Watchdog
Timer