EP3C5F256C8N Altera, EP3C5F256C8N Datasheet - Page 237

IC CYCLONE III FPGA 5K 256-FBGA

EP3C5F256C8N

Manufacturer Part Number
EP3C5F256C8N
Description
IC CYCLONE III FPGA 5K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C5F256C8N

Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
No. Of Logic Blocks
321
Family Type
Cyclone III
No. Of I/o's
182
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2423
EP3C5F256C8N

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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Remote System Upgrade
Remote System Upgrade
Functional Description
© December 2009
1
Altera Corporation
Cyclone III devices support remote system upgrade in AS and AP configuration
schemes. Cyclone III LS devices support remote system upgrade in the AS
configuration scheme only. Remote system upgrade can also be implemented with
advanced Cyclone III features such as real-time decompression of configuration data
in the AS configuration scheme.
The dedicated remote system upgrade circuitry in Cyclone III device family manages
remote configuration and provides error detection, recovery, and status information.
User logic or a Nios
array provides access to the remote configuration data source and an interface to the
configuration memory.
Configuration memory refers to serial configuration devices (EPCS) or supported
parallel flash memory, and depends on the configuration scheme that you use.
The remote system upgrade process of Cyclone III device family involves the
following steps:
1. A Nios II processor (or user logic) implemented in the Cyclone III device family
2. The Nios II processor (or user logic) writes this new configuration data into a
3. The Nios II processor (or user logic) starts a reconfiguration cycle with the new or
4. The dedicated remote system upgrade circuitry detects and recovers from any
The serial configuration device uses the AS configuration scheme to configure
Cyclone III or Cyclone III LS devices
The supported parallel flash uses the AP configuration scheme to configure
Cyclone III devices
Remote system upgrade is not supported in the multi-device configuration chain
for any configuration scheme.
logic array receives new configuration data from a remote location. The connection
to the remote source is a communication protocol such as the transmission control
protocol/Internet protocol (TCP/IP), peripheral component interconnect (PCI),
user datagram protocol (UDP), universal asynchronous receiver/transmitter
(UART), or a proprietary interface.
configuration memory.
updated configuration data.
error that might occur during or after the reconfiguration cycle, and provides error
status information to the user design.
®
II processor implemented in the Cyclone III device family logic
Cyclone III Device Handbook, Volume 1
9–77

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