DSPB56366AG120 Freescale Semiconductor, DSPB56366AG120 Datasheet - Page 99

• Manufacturer Part Number: DSPB56366AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56366AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (240 kB)
• On-chip Ram: 69kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.3
Power dissipation is a key issue in portable DSP applications. Some of the factors which affect current
consumption are described in this section. Most of the current consumed by CMOS devices is alternating
current (ac), which is charging and discharging the capacitances of the pins and internal nodes.
Current consumption is described by the following formula:
where:
The maximum internal current (I
on best-case operation conditions, which is not necessarily a real application case. The typical internal
current (I
For applications that require very low current consumption, do the following:
One way to evaluate power consumption is to use a current per MIPS measurement methodology to
minimize specific board effects (i.e., to compensate for measured board current not caused by the DSP).
A benchmark power consumption test algorithm is listed in Appendix A. Use the test algorithm, specific
test current measurements, and the following equation to derive the current per MIPS value.
Freescale Semiconductor
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For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, and with a 120
MHz clock, toggling at its maximum possible rate (60 MHz), the current consumption is
Take special care to minimize noise levels on the V
If multiple DSP56366 devices are on the same board, check for cross-talk or excessive spikes on
the supplies due to synchronous operation of the devices.
RESET must be asserted when the chip is powered up. A stable EXTAL signal must be supplied
while RESET is being asserted.
At power-up, ensure that the voltage difference between the 5 V tolerant pins and the chip V
never exceeds 3.95 V.
Set the EBD bit when not accessing external memory.
Minimize external memory accesses and use internal memory accesses.
Minimize the number of pins that are switching.
Minimize the capacitive load on the pins.
Connect the unused inputs to pull-up or pull-down resistors.
Disable unused peripherals.
CCItyp
Power Consumption Considerations
C
V
f
) value reflects the average switching of the internal buses on typical operating conditions.
= node/pin capacitance
= voltage swing
= frequency of node/pin toggle
I
CCI
=
50 10
max) value reflects the typical possible switching of the internal buses
Example 1. Current Consumption
DSP56366 Technical Data, Rev. 3.1
×
–
12
I
×
=
3.3 60
C V
×
×
×
×
f
CCP
10
6
and GND
=
9.9mA
P
pins.
CC
5-3