DSPB56366AG120 Freescale Semiconductor, DSPB56366AG120 Datasheet - Page 7

• Manufacturer Part Number: DSPB56366AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56366AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (240 kB)
• On-chip Ram: 69kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.2
2.3
Freescale Semiconductor
Ground Name
Power Name
V
GND
V
GND
V
V
V
V
CCQH
CCQL
GND
CCA
CCD
CCC
V
CCS
V
CCH
CCP
Q
A
Power
Ground
(3)
(2)
(4)
(2)
P
(4)
(4)
(4)
(3)
PLL Power—V
should be provided with an extremely low impedance path to the V
Quiet Core (Low) Power—V
be tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are four V
Quiet External (High) Power—V
externally to all other chip power inputs. The user must provide adequate decoupling capacitors. There are
three V
Address Bus Power—V
must be tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are three V
Data Bus Power—V
tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are four V
Bus Control Power—V
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors.
There are two V
Host Power—V
other chip power inputs. The user must provide adequate external decoupling capacitors. There is one
V
SHI, ESAI, ESAI_1, DAX and Timer Power —V
and Timer. This input must be tied externally to all other chip power inputs. The user must provide
adequate external decoupling capacitors. There are two V
PLL Ground—GND
extremely low-impedance path to ground. V
located as close as possible to the chip package. There is one GND
Quiet Ground—GND
tied externally to all other chip ground connections. The user must provide adequate external decoupling
capacitors. There are four GND
Address Bus Ground—GND
connection must be tied externally to all other chip ground connections. The user must provide adequate
external decoupling capacitors. There are four GND
CCH
input.
CCQH
inputs.
CCP
CCC
CCH
is V
is an isolated power for the HDI08 I/O drivers. This input must be tied externally to all
P
inputs.
CCD
Q
is a ground dedicated for PLL use. The connection should be provided with an
CC
is an isolated ground for the internal processing logic. This connection must be
DSP56366 Technical Data, Rev. 3.1
CCC
CCA
is an isolated power for sections of the data bus I/O drivers. This input must be
dedicated for PLL use. The voltage should be well-regulated and the input
CCQL
CCD
Table 2-2 Power Inputs
is an isolated power for the bus control I/O drivers. This input must be tied
CCQL
CCA
is an isolated power for sections of the address bus I/O drivers. This input
A
Table 2-3 Grounds
Q
is an isolated ground for sections of the address bus I/O drivers. This
inputs.
inputs.
CCQH
connections.
inputs.
is an isolated power for the internal processing logic. This input must
is a quiet power source for I/O lines. This input must be tied
CCP
Description
Description
CCS
should be bypassed to GND
A
is an isolated power for the SHI, ESAI, ESAI_1, DAX
connections.
CCS
inputs.
CC
P
power rail. There is one V
connection.
P
by a 0.47 μF capacitor
CCP
input.
2-3