MT46H8M32LFB5-6IT:H Micron Technology Inc, MT46H8M32LFB5-6IT:H Datasheet - Page 83
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MT46H8M32LFB5-6IT:H
Manufacturer Part Number
MT46H8M32LFB5-6IT:H
Description
MICMT46H8M32LFB5-6_IT:H MDDDR
Manufacturer
Micron Technology Inc
Datasheet
1.MT46H8M32LFB5-6ITH.pdf
(96 pages)
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Figure 44: Bank Read – With Auto Precharge
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. I 09/10 EN
Case 1:
Case 2:
Command
BA0, BA1
Address
DQ
DQ
DQS
DQS
t
t
CK#
CKE
A10
DM
AC (MIN) and
AC (MAX) and
CK
4,5
4,5
4
4
t
t
IS
IS
NOP
T0
t
DQSCK (MIN)
t
t
DQSCK (MAX)
1
t
IH
IH
Notes:
Bank x
ACTIVE
t
t
IS
IS
Row
Row
T1
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. Enable auto precharge.
4. Refer to Figure 29 (page 66) and Figure 30 (page 67) for detailed DQS and DQ timing.
5. D
t
t
IH
IH
t
CK
these times.
OUT
t
t
RAS
RCD
t
RC
n = data-out from column n.
NOP
T2
1
t
CH
t
CL
t
t
Note 3
Bank x
READ
IS
LZ (MIN)
Col n
T3
t
2
IH
83
t
CL = 2
RPRE
t
t
LZ (MIN)
AC (MIN)
256Mb: x16, x32 Mobile LPDDR SDRAM
NOP
T4
1
t
AC (MAX)
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
D
RPRE
OUT
n
t
DQSCK (MIN)
NOP
D
n + 1
T5
D
OUT
OUT
t
n
DQSCK (MAX)
1
T5n
D
D
OUT
n + 1
x
OUT
t
RP
NOP
D
x + 1
T6
t
OUT
D
RPST
OUT
x
1
Don’t Care
t
HZ (MAX)
© 2008 Micron Technology, Inc. All rights reserved.
T6n
D
x + 1
t
RPST
OUT
Auto Precharge
NOP
T7
1
Transitioning Data
ACTIVE
Bank x
Row
Row
T8
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