MT46H8M32LFB5-6IT:H Micron Technology Inc, MT46H8M32LFB5-6IT:H Datasheet - Page 42

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MT46H8M32LFB5-6IT:H

Manufacturer Part Number
MT46H8M32LFB5-6IT:H
Description
MICMT46H8M32LFB5-6_IT:H MDDDR
Manufacturer
Micron Technology Inc
Datasheet

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Table 16: Truth Table – Current State Bank n – Command to Bank m
Notes 1–6 apply to all parameters in this table
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. I 09/10 EN
Current State
Any
Idle
Row activating,
active, or pre-
charging
Read (auto pre-
charge disabled)
Write (auto pre-
charge disabled)
Read (with auto
precharge)
Write (with auto
precharge)
CS#
H
X
Notes:
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS#
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
1. This table applies when CKE
2. This table describes alternate bank operation, except where noted (for example, the cur-
3. Current state definitions:
the previous state was self refresh), after
power-down) or after a full initialization (if the previous state was deep power-down).
rent state is for bank n and the commands shown are those supported for issue to bank
m, assuming that bank m is in such a state that the given command is supported). Excep-
tions are covered in the notes below.
Idle: The bank has been precharged, and
Row active: A row in the bank has been activated, and
bursts/accesses and no register accesses are in progress.
Read: A READ burst has been initiated and has not yet terminated or been terminated.
Write: A WRITE burst has been initiated and has not yet terminated or been terminated.
3a. Both the read with auto precharge enabled state or the write with auto precharge
enabled state can be broken into two parts: the access period and the precharge period.
For read with auto precharge, the precharge period is defined as if the same burst was
CAS#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
WE#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
Command/Action
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command supported to bank m
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
42
n - 1
256Mb: x16, x32 Mobile LPDDR SDRAM
was HIGH, CKE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
t
XP has been met (if the previous state was
RP has been met.
n
is HIGH and after
t
RCD has been met. No data
© 2008 Micron Technology, Inc. All rights reserved.
t
XSR has been met (if
Truth Tables
Notes
7
7

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