LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 37

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
4.6.2
the low or high word first, as long as the next write is performed to the other word. If a write to the
same word is performed, the LAN9118 disregards the transfer.
16-bit Bus Reads
The host processor is required to perform two consecutive 16-bit reads to complete a single DWORD
transfer. This DWORD must begin and end on a DWORD address boundary (A[2] and higher, cannot
change during a sixteen bit read). No ordering requirements exist. The processor can access either
the low or high word first, as long as the next read is performed from the other word. If a read to the
same word is performed, the data read is invalid and should be re-read. This is not a fatal error. The
LAN9118 will reset its read counters and restart a new cycle on the next read. The Upper 16 data pins
(D[31:16]) are not driven by the LAN9118 in 16-bit mode. These pins have internal pull-down’s and the
signals are left in a high-impedance state.
DATASHEET
37
Revision 1.0 (03-17-05)