LFXP6C-4QN208I Lattice, LFXP6C-4QN208I Datasheet - Page 320

• Manufacturer Part Number: LFXP6C-4QN208I
• Description: FPGA LatticeXP Family 6000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 208-Pin PQFP Tray
• Manufacturer: Lattice

Specifications of LFXP6C-4QN208I

• Package: 208PQFP
• Family Name: LatticeXP
• Device Logic Units: 6000
• Maximum Internal Frequency: 360 MHz
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Maximum Number Of User I/os: 142
• Ram Bits: 73728
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Lattice ispTRACY Usage Guide
Once IPexpress is launched, you will be presented with the option of generating the ispTRACY IP module by
selecting the JTAG module uner Architecture and clicking the Customize button. Figure 14-2 shows the IPexpress
window. Selections for the project path and module name are made through this window
Figure 14-2. ispTRACY IP Manager Program Window
ispTRACY Core Generator
The ispTRACY Core Generator under JTAG Module provides all the controls for customizing the ispTRACY
core(s). Selections on this page influence the final size of the core(s) inside the FPGA and features available in
terms of triggers, size of data bus and depth of memory capture. Figure 14-3 shows the Core Generator window
and Table 14-3 contains descriptions of each of the figures available in the IP core. Once the core features are
selected, clicking on the Generate button will create the necessary files for the Core Linker Program.
Figure 14-3. ispTRACY Core Generator Window
14-2