IDT82V3355TF IDT, Integrated Device Technology Inc, IDT82V3355TF Datasheet - Page 98

IDT82V3355TF

Manufacturer Part Number
IDT82V3355TF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V3355TF

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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T0_HOLDOVER_FREQ[15:8]_CNFG - T0 DPLL Holdover Frequency Configuration 2
T0_HOLDOVER_FREQ[23:16]_CNFG - T0 DPLL Holdover Frequency Configuration 3
Programming Information
Address: 5EH
Type: Read / Write
Default Value: 00000000
IDT82V3355
Address: 5FH
Type: Read / Write
Default Value: 00000000
T0_HOLDOVER
T0_HOLDOVER
_FREQ15
7 - 0
_FREQ23
7 - 0
Bit
Bit
7
7
T0_HOLDOVER_FREQ[23:16]
T0_HOLDOVER_FREQ[15:8] Refer to the description of the T0_HOLDOVER_FREQ[23:16] bits (b7~0, 5FH).
T0_HOLDOVER
T0_HOLDOVER
_FREQ14
_FREQ22
Name
Name
6
6
T0_HOLDOVER
T0_HOLDOVER
_FREQ13
_FREQ21
The T0_HOLDOVER_FREQ[23:0] bits represent a 2’s complement signed integer.
In T0 DPLL Holdover mode, the value written to these bits multiplied by 0.000011 is the frequency offset set manu-
ally; the value read from these bits multiplied by 0.000011 is the frequency offset automatically slow or fast aver-
aged or manually set, as determined by the READ_AVG bit (b4, 5CH) and the FAST_AVG bit (b5, 5CH).
5
5
T0_HOLDOVE
T0_HOLDOVE
R_FREQ12
R_FREQ20
4
4
98
T0_HOLDOVE
T0_HOLDOVE
R_FREQ11
R_FREQ19
3
3
Description
Description
T0_HOLDOVE
T0_HOLDOVE
R_FREQ10
R_FREQ18
2
2
SYNCHRONOUS ETHERNET WAN PLL
T0_HOLDOVE
T0_HOLDOVE
R_FREQ17
R_FREQ9
1
1
T0_HOLDOVE
T0_HOLDOVE
R_FREQ16
R_FREQ8
May 19, 2009
0
0

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