IDT82V3355TF IDT, Integrated Device Technology Inc, IDT82V3355TF Datasheet - Page 8

• Manufacturer Part Number: IDT82V3355TF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V3355TF

• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

List of Figures
Figure 1. Functional Block Diagram ............................................................................................................................................................................ 11
Figure 2. Pin Assignment (Top View) .......................................................................................................................................................................... 12
Figure 3. Pre-Divider for An Input Clock ..................................................................................................................................................................... 19
Figure 4. Input Clock Activity Monitoring ..................................................................................................................................................................... 20
Figure 5. External Fast Selection ................................................................................................................................................................................ 22
Figure 6. T0 Selected Input Clock vs. DPLL Automatic Operating Mode ................................................................................................................... 29
Figure 7. T4 Selected Input Clock vs. DPLL Automatic Operating Mode ................................................................................................................... 30
Figure 8. On Target Frame Sync Input Signal Timing ................................................................................................................................................. 39
Figure 9. 0.5 UI Early Frame Sync Input Signal Timing .............................................................................................................................................. 39
Figure 10. 0.5 UI Late Frame Sync Input Signal Timing .............................................................................................................................................. 40
Figure 11. 1 UI Late Frame Sync Input Signal Timing ................................................................................................................................................. 40
Figure 12. IDT82V3355 Power Decoupling Scheme ................................................................................................................................................... 42
Figure 13. Line Card Application ................................................................................................................................................................................. 43
Figure 14. Serial Read Timing Diagram (CLKE Asserted Low) ................................................................................................................................... 44
Figure 15. Serial Read Timing Diagram (CLKE Asserted High) .................................................................................................................................. 44
Figure 16. Serial Write Timing Diagram ....................................................................................................................................................................... 45
Figure 17. JTAG Interface Timing Diagram ................................................................................................................................................................. 46
Figure 18. Recommended PECL Input Port Line Termination .................................................................................................................................. 115
Figure 19. Recommended PECL Output Port Line Termination ................................................................................................................................ 115
Figure 20. Recommended LVDS Input Port Line Termination .................................................................................................................................. 117
Figure 21. Recommended LVDS Output Port Line Termination ................................................................................................................................ 117
Figure 22. Example of Single-Ended Signal to Drive Differential Input ..................................................................................................................... 118
Figure 23. Output Wander Generation ...................................................................................................................................................................... 122
Figure 24. Input / Output Clock Timing ...................................................................................................................................................................... 123
Figure 25. 64-Pin PP Package Dimensions (a) (in Millimeters) ................................................................................................................................. 130
Figure 26. 64-Pin PP Package Dimensions (b) (in Millimeters) ................................................................................................................................. 131
Figure 27. 64-Pin EDG Package Dimensions (a) (in Millimeters) .............................................................................................................................. 132
Figure 28. 64-Pin EDG Package Dimensions (b) (in Millimeters) .............................................................................................................................. 133
Figure 29. EDG64 Recommended Land Pattern with Exposed Pad (in Millimeters) ................................................................................................. 134
List of Figures
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May 19, 2009