EVAL-AD9388AFEZ_3 Analog Devices Inc, EVAL-AD9388AFEZ_3 Datasheet - Page 20

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EVAL-AD9388AFEZ_3

Manufacturer Part Number
EVAL-AD9388AFEZ_3
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD9388AFEZ_3

Lead Free Status / Rohs Status
Supplier Unconfirmed
AD9388A
REGISTER MAP ARCHITECTURE
The AD9388A registers are controlled via a 2-wire serial (I
I
Table 10. AD9388A Map Addresses
Register Map
User Map
User Map 1
User Map 2
VDP Map
Reserved Map
HDMI Map
Repeater/KSV Map
EDID Map
2
C address. The state of the ALSB pin (Pin 13) sets Bit 2 of each register map address in Table 10.
SDA
SCL
Address with
ALSB = Low
0x40
0x44
0x60
0x48
0x4C
0x68
0x64
0x6C
USER MAP
SA: 0x40
PROGRAMMABLE
HDMI MAP
SA:
Figure 7. Register Map Access Through the Main I
Address with
ALSB = High
0x42
0x46
0x62
0x4A
0x4E
0x6A
0x66
0x6E
PROGRAMMABLE
USER MAP 1
SA:
2
C-compatible) interface. The AD9388A has eight maps, each with a unique
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PROGRAMMABLE
EDID MAP
SA:
Programmable Address
Not programmable
Programmable
Programmable
Programmable
Programmable
Programmable
Programmable
Programmable
PROGRAMMABLE
USER MAP 2
SA:
PROGRAMMABLE
2
C Port
REPEATER/
KSV MAP
SA:
PROGRAMMABLE
VDP MAP
SA:
User Map 2, Register 0xEF
Location at Which Address
Can Be Programmed
N/A
User Map 2, Register 0xEB
User Map, Register 0x0E
User Map 2, Register 0xEC
User Map 2, Register 0xEA
User Map 2, Register 0xED
User Map 2, Register 0xEE
PROGRAMMABLE
RESERVED MAP
SA: