EVAL-AD9388AFEZ_3 Analog Devices Inc, EVAL-AD9388AFEZ_3 Datasheet - Page 16

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EVAL-AD9388AFEZ_3

Manufacturer Part Number
EVAL-AD9388AFEZ_3
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD9388AFEZ_3

Lead Free Status / Rohs Status
Supplier Unconfirmed
AD9388A
FUNCTIONAL OVERVIEW
The following overview provides a brief description of the
functionality of the AD9388A. More details are available in the
Theory of Operation section.
ANALOG FRONT END
The analog front end of the AD9388A provides three high quality
10-bit ADCs to enable true 10-bit video decoding, a multiplexer
with 12 analog input channels to enable a multisource connection
without the requirement of an external multiplexer, and three
current and voltage clamp control loops to ensure that dc offsets
are removed from the video signal.
HDMI RECEIVER
The AD9388A is compatible with the HDMI 1.3 specification.
The AD9388A supports all HDTV formats up to 1080p in non–
Deep Color mode and 1080p in 36-bit Deep Color mode.
Furthermore, it supports all display resolutions up to UXGA
(1600 × 1200 at 60 Hz).
This device includes the following features:
COMPONENT PROCESSOR PIXEL DATA
OUTPUT MODES
The AD9388A features single data rate outputs as follows:
COMPONENT VIDEO PROCESSING
The AD9388A supports 525i, 625i, 525p, 625p, 720p, 1080i,
1080p, and many other HDTV formats. It provides automatic
adjustment of gain (contrast) and offset (brightness), as well as
manual adjustment controls. Furthermore, the AD9388A not
only supports analog component YPrPb/RGB video formats
with embedded synchronization or with separate HS, VS, and CS,
but also supports YCrCb-to-RGB and RGB-to-YCrCb conversions
by any-to-any, 3 × 3 color-space conversion matrices and user-
defined pixel sampling for nonstandard video sources.
In addition, the AD9388A features brightness, saturation, and
hue controls. Standard identification (STDI) enables detection
Adaptive front-end equalization for HDMI operation over
cable lengths of up to 30 meters
Synchronization conditioning for higher performance in
strenuous conditions
Audio mute for removing extraneous noises
Programmable data island packet interrupt generator
8-/10-bit 4:2:2 YCrCb for 525i, 625i
16-/20-bit 4:2:2 YCrCb for all standards
24-/30-bit 4:4:4 YCrCb/RGB for all standards
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of the component format at the system level, and a synchroniza-
tion source polarity detector (SSPD) determines the source and
polarity of the synchronization signals that accompany the
input video.
Certified Macrovision® copy protection detection is available on
component formats (525i, 625i, 525p, and 625p).
When no video input is present, stable timing is provided by the
free run output mode.
RGB GRAPHICS PROCESSING
The AD9388A provides 170 MSPS conversion rate support of
RGB input resolutions up to 1600 × 1200 at 60 Hz (UXGA).
The AD9388A offers automatic or manual clamp and gain controls
for graphics modes.
Similar to the component video processing features, the RGB
graphics processing for the AD9388A features contrast and
brightness controls, automatic detection of synchronization
source and polarity by the SSPD block, standard identification
enabled by the STDI block, and user-defined pixel sampling
support for nonstandard video sources.
Additional RGB graphics processing features of the AD9388A
include the following:
GENERAL FEATURES
The AD9388A offers a high quality multiformat video decoder
and digitizer that feature HS, VS, and FIELD output signals
with programmable position, polarity, and width. It also
includes programmable interrupt request output pins (INT1
and INT2).
The part offers low power consumption—1.8 V digital core and
analog input, and 3.3 V digital input/output—and a low power
power-down mode.
The AD9388A operates over a temperature range of −40°C to
+85°C and is available in a 144-lead, 20 mm × 20 mm, RoHS-
compliant LQFP.
Sampling PLL clock with 500 ps p-p jitter at 150 MSPS
32-phase DLL support of optimum pixel clock sampling
Color-space conversion of RGB to YCrCb and decimation
to a 4:2:2 format for videocentric, back-end IC interfacing
Data enable (DE) output signal supplied for direct
connection to HDMI/DVI transmitter IC