EVAL-AD9388AFEZ_3 Analog Devices Inc, EVAL-AD9388AFEZ_3 Datasheet - Page 12

• Manufacturer Part Number: EVAL-AD9388AFEZ_3
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD9388AFEZ_3

• Lead Free Status / Rohs Status: Supplier Unconfirmed

AD9388A
Pin No.
121
122
128
129
131
132
134
135
137
138
106
1
105
144
2
3
4
5
6
7
8
9
10
48
124
1
G = ground, P = power, I = input, and O = output.
Mnemonic
RXA_2N
RXA_2P
RXB_CN
RXB_CP
RXB_0N
RXB_0P
RXB_1N
RXB_1P
RXB_2N
RXB_2P
DDCA_SDA
DDCB_SDA
DDCA_SCL
DDCB_SCL
SPDIF
I2S0
I2S1
I2S2
I2S3
LRCLK
SCLK
MCLKOUT
EXT_CLAMP
EXT_CLK
RTERM
Rev. D | Page 12 of 24
Type
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I
I
O
O
O
O
O
O
O
O
I
I
I
1
Digital Input Channel 2 True of Port A in the HDMI Interface.
HDCP Slave Serial Clock Port A.
HDCP Slave Serial Clock Port B.
Audio Serial Clock Output.
Audio Master Clock Output.
Description
Digital Input Channel 2 Complement of Port A in the HDMI Interface.
Digital Input Clock Complement of Port B in the HDMI Interface.
Digital Input Clock True of Port B in the HDMI Interface.
Digital Input Channel 0 Complement of Port B in the HDMI Interface.
Digital Input Channel 0 True of Port B in the HDMI Interface.
Digital Input Channel 1 Complement of Port B in the HDMI Interface.
Digital Input Channel 1 True of Port B in the HDMI Interface.
Digital Input Channel 2 Complement of Port B in the HDMI Interface.
Digital Input Channel 2 True of Port B in the HDMI Interface.
HDCP Slave Serial Data Port A.
HDCP Slave Serial Data Port B.
SPDIF Digital Audio Output.
I
I
I
I
Data Output Clock for Left and Right Audio Channels.
External Clamp Signal. This is an optional mode of operation for the
AD9388A.
Clock Input for External Clock and Clamp Mode. This is an optional
mode of operation for the AD9388A.
Sets Internal Termination Resistance. Connect this pin to TGND using
a 500 Ω resistor.
2
2
2
2
S Audio for Channel 1 and Channel 2.
S Audio for Channel 3 and Channel 4.
S Audio for Channel 5 and Channel 6.
S Audio for Channel 7 and Channel 8.