EVAL-AD9388AFEZ_3 Analog Devices Inc, EVAL-AD9388AFEZ_3 Datasheet - Page 17

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EVAL-AD9388AFEZ_3

Manufacturer Part Number
EVAL-AD9388AFEZ_3
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD9388AFEZ_3

Lead Free Status / Rohs Status
Supplier Unconfirmed
THEORY OF OPERATION
ANALOG FRONT END
The AD9388A analog front end comprises three 10-bit ADCs
that digitize the analog video signal before applying it to the CP.
The analog front end uses differential channels to each ADC to
ensure high performance in mixed-signal applications.
The front end also includes a 12-channel input multiplexer that
enables multiple video signals to be applied to the AD9388A.
Current and voltage clamps are positioned in front of each ADC
to ensure that the video signal remains within the range of the
converter. Fine clamping of the video signals is performed
downstream by digital fine clamping in the CP.
For component 525i, 625i, 525p, and 625p sources, 2× over-
sampling is performed, but 4× oversampling is available for
component 525i and 625i. All other video standards are 1×
oversampled. Oversampling the video signals reduces the cost
and complexity of external antialiasing (AA) filters, with the
additional benefit of increasing the signal-to-noise ratio (SNR).
HDMI RECEIVER
The HDMI receiver on the AD9388A incorporates active
equalization of the HDMI data signals. This equalization
compensates for the high frequency losses inherent in HDMI
and DVI cables, especially those with long lengths and high
frequencies. Because the AD9338A can provide equalization
compensation for cable lengths up to 30 meters, it is capable of
achieving robust receiver performance at even the highest
HDMI data rates.
With the inclusion of HDCP, displays can receive encrypted
video content. The HDMI interface of the AD9388A allows
for authentication of a video receiver, decryption of encoded
data at the receiver, and renewability of that authentication
during transmission as specified by the HDCP 1.3 protocol.
The HDMI receiver also offers advanced audio functionality.
The receiver contains an audio mute controller that can detect a
variety of selectable conditions that may result in audible
extraneous noise in the audio output. Upon detection of these
conditions, the audio data can be ramped to prevent audio
clicks and pops.
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COMPONENT PROCESSOR (CP)
The CP is capable of decoding and digitizing a wide range of
component video formats in any color space. Component video
standards supported by the CP include 525i, 625i, 525p, 625p,
720p, 1080i, 1080p, 1250i, VGA up to UXGA at 60 Hz, and
many other standards.
The CP section of the AD9388A contains an AGC block. This
block is followed by a digital clamp circuit that ensures that the
video signal is clamped to the correct blanking level. Automatic
adjustments within the CP include gain (contrast) and offset
(brightness); however, manual adjustment controls are also
supported. If no embedded synchronization is present, the
video gain can be set manually.
A fully programmable, any-to-any, 3 × 3 color-space converter
is placed before the CP section. This enables YPrPb-to-RGB
and RGB-to-YCrCb conversions. Many other standards of color
space can be implemented using the color-space converter.
A second fully programmable, any-to-any, 3 × 3 color-space
converter is placed in the back end of the CP core. This color-
space converter features advanced color controls, such as
contrast, saturation, brightness, and hue controls.
The output section of the CP can be configured in single data
rate (SDR) mode with one data packet per clock cycle. In SDR
mode, a 16-/20-bit 4:2:2 or 24-/30-bit 4:4:4 output is possible. In
these modes, HS/CS, VS/FIELD, and DE/FIELD (where
applicable) timing reference signals are provided.
The CP section contains circuitry to enable the detection of
Macrovision-encoded YPrPb signals for 525i, 625i, 525p, and
625p. It is designed to be fully robust when decoding these
types of signals.
VBI DATA PROCESSOR
VBI extraction of CGMS data is performed by the VBI data
processor (VDP) section of the AD9388A for interlaced,
progressive, and high definition scanning rates. The data
extracted is read back over the I
For more detailed product information about the AD9388A,
contact a local Analog Devices sales representative or field
applications engineer (FAE).
2
C interface.
AD9388A