MT47H32M16HR-3:FTR Micron Technology Inc, MT47H32M16HR-3:FTR Datasheet - Page 87
![](/photos/31/34/313419/mfg557-84-fbga_sml.jpg)
MT47H32M16HR-3:FTR
Manufacturer Part Number
MT47H32M16HR-3:FTR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16HR-3FTR.pdf
(131 pages)
Specifications of MT47H32M16HR-3:FTR
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
250mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT47H32M16HR-3:FTR
Manufacturer:
MICRON/镁光
Quantity:
20 000
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512MbDDR2.pdf - Rev. Q 10/10 EN
10. Issue two or more REFRESH commands.
11. Issue a LOAD MODE command to the MR with LOW to A8 to initialize device operation
12. Issue a LOAD MODE command to the EMR to enable OCD default by setting bits E7, E8,
13. Issue a LOAD MODE command to the EMR to enable OCD exit by setting bits E7, E8, and
14. The DDR2 SDRAM is now initialized and ready for normal operation 200 clock cycles af-
15. DM represents DM for the x4, x8 configurations and UDM, LDM for the x16 configura-
16. A10 = PRECHARGE ALL, CODE = desired values for mode registers (bank addresses are
(that is, to program operating parameters without resetting the DLL). To access the MR,
set BA0 and BA1 LOW; remaining MR bits must be set to desired settings. Mode Register
(MR) (page 74) for all MR requirements.
and E9 to “1,” and then setting all other desired parameters. To access the EMR, set BA0
HIGH and BA1 LOW (see Extended Mode Register (EMR) (page 79) for all EMR require-
ments.
E9 to “0,” and then setting all other desired parameters. To access the extended mode
registers, EMR, set BA0 HIGH and BA1 LOW for all EMR requirements.
ter the DLL RESET at Tf0.
tion; DQS represents DQS, DQS#, UDQS, UDQS#, LDQS, LDQS#, RDQS, RDQS# for the
appropriate configuration (x4, x8, x16); DQ represents DQ0–DQ3 for x4, DQ–DQ7 for x8
and DQ0–DQ15 for x16.
required to be decoded).
87
Micron Technology, Inc. reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
© 2004 Micron Technology, Inc. All rights reserved.
Initialization
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