MT47H32M16HR-3:FTR Micron Technology Inc, MT47H32M16HR-3:FTR Datasheet - Page 27
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MT47H32M16HR-3:FTR
Manufacturer Part Number
MT47H32M16HR-3:FTR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16HR-3FTR.pdf
(131 pages)
Specifications of MT47H32M16HR-3:FTR
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
250mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT47H32M16HR-3:FTR
Manufacturer:
MICRON/镁光
Quantity:
20 000
Table 11: DDR2 I
Notes: 1–7 apply to the entire table
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. Q 10/10 EN
Parameter/Condition
Operating one bank active-precharge
current:
t
HIGH between valid commands; address bus
inputs are switching; Data bus inputs are
switching
Operating one bank active-read-pre-
charge current: I
(I
t
is HIGH, CS# is HIGH between valid com-
mands; address bus inputs are switching; Da-
ta pattern is same as I
Precharge power-down current: All banks
idle;
trol and address bus inputs are stable; Data
bus inputs are floating
Precharge quiet standby current: All
banks idle;
HIGH; Other control and address bus inputs
are stable; Data bus inputs are floating
Precharge standby current: All banks idle;
t
er control and address bus inputs are switch-
ing; Data bus inputs are switching
Active power-down current: All banks
open;
trol and address bus inputs are stable; Data
bus inputs are floating
Active standby current: All banks open;
t
t
valid commands; Other control and address
bus inputs are switching; Data bus inputs are
switching
Operating burst write current: All banks
open, continuous burst writes; BL = 4, CL =
CL (I
MAX (I
HIGH between valid commands; address bus
inputs are switching; Data bus inputs are
switching
RAS =
RAS =
CK =
CK =
RP (I
DD
), AL = 0;
DD
t
DD
CK =
t
t
t
CK (I
CK (I
), AL = 0;
DD
t
t
CK =
); CKE is HIGH, CS# is HIGH between
RAS MIN (I
RAS MIN (I
),
t
CK =
t
DD
DD
t
CK (I
t
RP =
CK =
t
CK (I
t
); CKE is HIGH, CS# is HIGH; Oth-
),
CK =
t
t
CK (I
RAS =
DD
t
CK =
t
t
DD
RP (I
CK (I
OUT
DD
DD
); CKE is LOW; Other con-
t
DD
CK (I
); CKE is LOW; Other con-
DD
); CKE is HIGH, CS# is
),
DD4W
DD
t
= 0mA; BL = 4, CL = CL
DD
t
t
CK (I
),
Specifications and Conditions (Die Revision G)
RAS MAX (I
RCD =
DD
); CKE is HIGH, CS# is
t
); CKE is HIGH, CS# is
RC =
),
DD
t
RC =
),
t
t
RCD (I
RC (I
t
RAS =
t
DD
RC (I
DD
DD
),
),
t
t
); CKE
RAS
DD
RP =
),
Symbol
I
I
I
I
I
I
I
DD3Pf
DD3Ps
DD4W
I
I
DD2Q
DD2N
DD3N
DD2P
DD0
DD1
Configuration
Slow PDN exit
Fast PDN exit
27
x4, x8, x16
MR12 = 0
MR12 = 1
Electrical Specifications – I
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x16
x16
x16
x16
x16
x16
Micron Technology, Inc. reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
-25E/
125
160
-25
65
80
75
95
24
26
28
30
18
33
35
7
9
-3E/-3
115
135
60
75
70
90
22
24
25
27
15
30
32
7
9
© 2004 Micron Technology, Inc. All rights reserved.
-37E
120
55
70
65
85
20
22
23
25
14
27
29
99
7
9
DD
Parameters
105
-5E
55
70
65
85
19
20
21
23
13
24
26
85
7
9
Units
mA
mA
mA
mA
mA
mA
mA
mA