STV3550B STMicroelectronics, STV3550B Datasheet - Page 71

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STV3550B

Manufacturer Part Number
STV3550B
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STV3550B

Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant

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STV3550
6.3.2
Note:
6.3.3
software may be downloaded from ROM to RAM when booting the STV3550. (The
download operation is implemented in software.)
The ROM device may be easily replaced by a Flash or a Synchronous Flash (SFlash)
device, but the STV3550 is not able to support bursted accesses because there is no
dedicated clock pad for a SFlash device. Therefore, a Synchronous Flash device may be
connected, but it will be used in standard asynchronous mode by the STV3550.
The maximum ROM size is 16 MBits (or 2 MBytes), as the device is connected on 20
address lines and 16 data lines.
Typical Flash devices, such as STM-29W160DT (STMicroelectronics) or AM29BL162C
(AMD) are compliant with the STV3550 memory interface.
The RAM device should be a Synchronous DRAM (SDRAM). A dedicated clock pad is
available on the STV3550. The maximum memory size is 256 MBits (or 32 MBytes),
connected on 14 address lines and 16 or 32 data lines. The SDRAM clock frequency may
be up to 100 MHz.
Typical SDRAM devices, such as μPD4564163 (NEC) or KM432S2030C (Samsung) are
compliant with the STV3550 memory interface.
Memory devices can be connected in different ways to accommodate a large number of
applications.
Configuring the STV3550 memory interface during boot
The STV3550 always boots on the ROM device, regardless of the SDRAM configuration.
After reset, the STV3550 Memory Interface accesses the ROM at a very low speed in order
to accommodate the slowest ROM devices available on the memory market.
The STV3550 boot address is 0x7FFFFFFF in the Flash memory.
Since the STV3550 is able to accommodate several memory configurations, the STV3550
Memory Interface should be configured accordingly during the boot. Software is used to
configure the memory (i.e. SDRAM size, data bus size, SDRAM and ROM latencies, etc.)
and does not require the use of external pins.
STV3550 embeds an internal RAM that can be used during the boot until the external
SDRAM is ready.
Once the STV3550 memory interface has been programmed properly, it is strongly
recommended not to apply any further modifications.
Address format
When interfacing a memory device through the STV3550 memory interface, the STV3550
uses a word address. Depending on the data bus size of the device, and knowing that the
minimum data bus size is 16 bits:
Byte Enable lines (NOT_BEx signals) are provided for processing only parts of data words
when required.
When using a 16-bit data word device (1 word = 2 bytes), bit 0 is the least significant
address bit,
When using a 32-bit data word device (1 word = 4 bytes), bit 1 is the least significant
address bit.
CPU and system management functional description
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