STV3550B STMicroelectronics, STV3550B Datasheet - Page 125
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STV3550B
Manufacturer Part Number
STV3550B
Description
Manufacturer
STMicroelectronics
Datasheet
1.STV3550B.pdf
(145 pages)
Specifications of STV3550B
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
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STV3550
7.8.6
Writes to the ASC_n_BaudRate register update the reload register value. Reads from the
ASC_n_BaudRate register return the current value of the counter.
Mode 1
When the BaudMode bit in the ASC_n_Control register is set to 1, the baud rate is
controlled by the following circuit:
Figure 76. Baud rates: mode 1
Writes to ASC_n_BaudRate go to the reload register. Reads from ASC_n_BaudRate return
the value in the accumulator register. Both registers are 16 bits wide and are clocked by the
subsystem clock.
If the system clock frequency is f
ASC_n_BaudRate register results in an average oversampling clock frequency of:
so the baud rate is given by:
This gives good granularity, and hence low baud rate deviation errors, at high baud rate
frequencies.
Interrupt control
Each ASC contains two registers that are used to control interrupts, the status register
(ASC_n_Status) and the interrupt enable register (ASC_n_IntEnable). The status bits in the
ASC_n_Status register show the cause of any interrupt. The interrupt enable register allows
certain interrupt causes to be masked. Interrupts will occur when a status bit is 1 (high) and
the corresponding bit in the ASC_n_IntEnable register is 1.
The ASC interrupt signal is generated from the OR of all interrupt status bits after they have
been ANDed with the corresponding enable bits in the ASC_n_IntEnable register, as shown
in
Figure
BaudRate =
77.
ASCBaudRate
(Reload)
ASCBaudRate x f
ASCBaudRate x f
2
16
CPU
16 x 2
, writing a value of ASCBaudRate to the
ASCBaudRate
(Accumulator)
CPU
16
CPU
f
CPU
Carry-out
Oversampling Clock
TV chassis control
125/145
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