PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 244

• Manufacturer Part Number: PEF2054NV21XK
• Manufacturer: Infineon Technologies

Specifications of PEF2054NV21XK

• Lead Free Status / Rohs Status: Compliant

For some applications, it is necessary to connect IOM-2 terminal devices (e.g. ARCOFI,
PSB 2160) to a PCM backplane. In such a configuration, the EPIC can be used as a rate
adaptor between these two differing data rates. Since the internal prescalers of the EPIC
cannot be used to convert the 2.048 Mbit/s (PCM) into 768 kbit/s (IOM-2 terminal mode),
an external clock converting circuit as shown in figure 87 has to be built up. A PLL
controlled oscillator generates the IOM-2 data clock of 1.536 MHz by comparing the
PCM clock divided by 4 with the DCL clock divided by 3.
Figure 87
Interface Circuit to adapt the IOM
5.9.3.3 Interfacing an IOM
Semiconductor Group
Backplane
8 kHz
2.048 MHz
2.048 Mbit/s
®
-2 Terminal Mode Interface to a 2.048 Mbit/s PCM
4
®
-2 (768 kbit/s) and PCM (2.048 Mbit/s) Data Rates
PFS
PDC
RxD0
TxD0
RxD1
TxD1
RxD2
TxD2
RxD3
TxD3
244
EPIC
PLL
3
P
R
FSC
DCL
DD0
DU0
DD1
DU1
DD2
DU2
DD3
DU3
1.536 MHz
4 x
(terminal mode)
x 4
IOM -2 Ports
768 kbit/s
R
ITS09559
Application Hints
DCL
FSC
PEB 2055
PEF 2055