PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 159
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PEF2054NV21XK
Manufacturer Part Number
PEF2054NV21XK
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF2054NV21XK.pdf
(269 pages)
Specifications of PEF2054NV21XK
Lead Free Status / Rohs Status
Compliant
- Current page: 159 of 269
- Download datasheet (2Mb)
W:MAAR
W:MACR
Upstream: CFI port 3, time slot 7, bits 3 … 2 to PCM port 0, time slot 4, bits 5 … 4
W:MADR
W:MAAR
W:MACR
The following sequence sets transmit time slot 4 of PCM port 0 bits 5 … 4 and 1 … 0 to
low impedance and bits 7 … 6 and 3 … 2 to high impedance:
W:MADR
W:MAAR
W:MACR
Downstream: CFI port 2, time slot 7, bits 3 … 0 from PCM port 1, time slot 3, bits 7 … 4
W:MADR
W:MAAR
W:MACR
Examples
In PCM mode 0 and CFI mode 0 the following connections shall be programmed:
Upstream: CFI port 0, time slot 3, bits 1 … 0 to PCM port 0, time slot 4, bits 1 … 0
W:MADR
Semiconductor Group
= 1001 0000
= 1000 1001
= 0111 0100
= 1001 0000
= 1001 1111
= 0111 0110
= 0000 0101
= 1001 0000
= 0110 0000
= 0000 1011
= 0001 1101
= 0111 0011
B
B
B
B
B
B
B
B
B
B
B
B
PCM time slot encoding, the subchannel position is
defined by MACR:CMC3 … 0 = 0100
CFI time slot encoding, the subchannel position is
defined by CSCR:SC01 … 00 = 11
CM code for switching a 16 kbit/s/bits 1 … 0
channel (0100)
PCM time slot encoding, the subchannel position is
defined by MACR:CMC3 … 0 = 0110
CFI time slot encoding, the subchannel position is
defined by CSCR:SC31 … 30 = 10
CM code for switching a 16 kbit/s, bits 3 … 2
channel (0110)
bits 5, 4, 1, 0 to low Z and bits 7, 6, 3, 2 to high Z
PCM time slot encoding
MOC code to access the tristate field
PCM time slot encoding, the subchannel position is
defined by MACR:CMC3 … 0 = 0011
CFI time slot encoding, the subchannel position is
defined by CSCR:SC21 … 20 = 01
CM code for switching a 32 kbit/s/bits 7 … 4
channel (0011)
159
Application Hints
PEB 2055
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