82V2608BB IDT, Integrated Device Technology Inc, 82V2608BB Datasheet - Page 25

• Manufacturer Part Number: 82V2608BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2608BB

• Utopia Level: Level 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Pin Count: 208
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Table-5 Input FIFO Data Length Register (INPUT_FIFO_LENGTH_REG)
Table-6 Output FIFO Data Length Register (OUTPUT_FIFO_LENGTH_REG)
Table-7 Output FIFO Data Register (OUTPUT_FIFO_DATA_REG)
Table-8 Input FIFO Data Register (INPUT_FIFO_DATA_REG)
3.3.5
IDT82V2608
INTERFACE
Output_Message_Length[4:0]
Input_Message_Length[4:0]
REGISTER DESCRIPTION
(R/W, Address=00H)
(R, Address=01H)
(R, Address=02H)
(R/W, Address=03H)
Output_Data[7:0]
Input_Data[7:0]
Symbol
Symbol
Symbol
Symbol
-
-
Position
Position
Position
Position
7-5
4-0
7-5
4-0
7-0
7-0
Default
Default
Default
Default
0
0
0
0
0
0
Reserved.
These 5 bits contain the message length in the Input FIFO which should be written after the mes-
sage is sent to the Input FIFO. The valid length is from 0 to 16 bytes.
Reserved.
These 5 bits contain the length of the message in the Output FIFO. Valid length is from 0 to 16
bytes.
These bits contain the data from the message Output FIFO. The complete message can be
retrieved by continuously reading this register.
These bits contain data to be sent to the Input FIFO. By continuously writing to this register, a
complete message can be sent. Before the message is sent, the Input_FIFO_empty_state bit in
the EP_interrupt status register should be polled to see whether the Input FIFO is available for
writing. After the message is sent, the message length should be written to the EP_Tx_length reg-
ister.
25
Description
Description
Description
Description
Inverse Multiplexing for ATM
December 4, 2006