EVAL-ADF7010EB1 Analog Devices Inc, EVAL-ADF7010EB1 Datasheet - Page 9

• Manufacturer Part Number: EVAL-ADF7010EB1
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADF7010EB1

• Lead Free Status / Rohs Status: Not Compliant

Using GFSK on the ADF7010
What is GFSK ? GFSK stands for Gaussian Frequency
Shift Keying, and it represents a filtered form of fre-
quency shift keying. The data to be modulated to RF
is pre-filtered digitally using an Finite Impulse Re-
sponse (FIR) filter. The filtered data is then used to
modulate the sigma-delta fractional-N, to generate
sprectrally-efficient FSK.
FSK consists of a series of sharp transitions in fre-
quency as the data is switched one level to the other.
The sharp switching will generate higher frequency
components at the output resulting in a wider output
spectrum.
With GFSK the sharp transitions are replaced with 3
smooth steps. The result is a gradual change in fre-
quency. As a result the higher frequency components
are reduced and the spectrum occupied is reduced sig-
nificantly.
Figure 6. GFSK Modulation of the same data signal is
shown. The upper signal represents the pre-filtered data
which is fed to the sigma delta modulator. The output
observed on the modulation domain analyzer(lower
signal) shows almost no overshoot.
GFSK is useful where the spectral occupancy is crucial.
It requires some extra design work, as the data most be
clocked into the ADF7010 at a constant rate.
Figure 5. FSK Modulation shown on a modulation do-
frequency overshoot as the PLL jumps from one fre-
main analyzer. The sharp data transitions results in
quency to another.
–IX–
Data from MicroCon-
troller
The bits designated for GFSK are in the modulation reg-
ister. To decide on what these should be set to, the fol-
lowing are required
Frequency Deviation - The deviation between the carrier
and a high, or half the distance between a zero or a one
frequency.
Data Rate -
The following formulas are use to find m (modulation
control (MC1 to MC3)), divider factor (D1 to D7) and
Index Counter (IC1 and IC2).
GFSK D
where m is the mod control, bits MC1 to MC3
D
Example
Data Rate(desired)
Deviation (desired)
PFD Frequency
m is approximately 2, which yields a deviation of
18.75kHz. Setting the Index counter to 16 and the divider
to 64 gives a datarate allowable of 18.75kbits/s. The
datarates are not as desired but this example shows the
limitation of GFSK, where exact datarates can only be
obtained by supplying a particular crystal frequency.
The TxCLK features provides a clock at this rate
(18.75kHz), which a microcontroller can use to clock the
data into the ADF7010.
the ADF7010 can send a clock at the datarate back to the
microcontroller to generate the exact datarate for GFSK,
ATA
R
Figure 7. In a case where it is difficult for the
ATE
EVIATION
(
BITS
/
S
(H
) =
Register
Z
Shift
) =
D
IVIDER FACTOR X
micro.
EVAL-ADF7010EB1
TxData
TxCLK
2
m
2
F
19.2kbits/s
19.2kHz
19.2MHz
X
12
PFD
F
REV.PrB 07/02
PFD
ADF7010
I
NDEX COUNTER