ANXL1500FGC3M AMD (ADVANCED MICRO DEVICES), ANXL1500FGC3M Datasheet - Page 25

• Manufacturer Part Number: ANXL1500FGC3M
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ANXL1500FGC3M

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Signal Definitions
2.3
2.3.1
2.3.2
2.3.3
AMD Geode™ NX Processors Data Book
Signal Name
SYSCLK
SYSCLK#
CLKIN
CLKIN#
RSTCLK
RSTCLK#
K7CLKOUT
K7CLKOUT#
Signal Name
PROCRDY
CONNECT
CLKFWDRST
STPCLK#
RESET#
CPU_PRESENCE
Signal Name
FERR
IGNNE#
Signal Descriptions
Clock Interface Signals
Power Management and Initialization Interface Signals
Southbridge Interface Signals
Pin No.
Pin No.
Pin No.
AN17
AN21
AN23
AL17
AL19
AL19
AL21
AL23
AJ21
AG3
AG1
AC1
AK6
AJ1
--
--
Port
Port
Port
--
--
O
O
O
--
O
I
I
I
I
I
I
I
I
I
Description
System Clock. SYSCLK and SYSCLK# are differential input clock
signals provided to the PLL of the processor from a system clock
generator. See CLKIN and RSTCLK (SYSCLK) signal description.
Clock In and Reset Clock. Connect CLKIN with RSTCLK and
name it SYSCLK. Connect CLKIN# with RSTCLK# and name it
SYSCLK#. Length match the clocks from the clock generator to the
Northbridge and processor.
K7 Clock Output. These signals are each terminated with a resistor
pair, 100 ohms to V
termination resistance and voltage are 50 ohms and V
Route as short as possible from the processor pins.
Description
Processor Ready. An output from the system used for power man-
agement and clock-forward initialization at reset.
Connect. An input from the system used for power management
and clock-forward initialization at reset.
Clock Forward Reset. Resets the clock-forward circuitry for both
the system and processor.
Stop Clock. An input that causes the processor to enter a lower
power mode and issue a Stop Grant special cycle.
Reset. When asserted, RESET# causes the initialization of all pro-
cessor states and invalidates cache blocks without write back of
previous data.
CPU Presence. CPU_PRESENCE# is connected to V
processor package. If pulled up on the circuit board, it may be used
to detect the presence or absence of a processor.
Description
Floating Point Error. An output to the system that is asserted for
any unmasked numerical exception independent of the NE bit in
CR0. FERR is a totem-pole-driven active High signal that must be
inverted and level shifted to an active Low signal.
For more information about FERR and FERR#, see the “Required
Circuits” chapter of the AMD Athlon™ Processor-Based Mother-
board Design Guide (publication ID 24363).
Ignore Numeric Errors. When asserted, this signal tells the pro-
cessor to ignore numeric errors.
CC_CORE
and 100 ohms to V
31177H
SS
. The effective
CC_CORE
SS
on the
/2.
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