PIC16LF1847-E/MV Microchip Technology, PIC16LF1847-E/MV Datasheet - Page 95

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan

PIC16LF1847-E/MV

Manufacturer Part Number
PIC16LF1847-E/MV
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16LF1847-E/MV

Processor Series
PIC16LF
Core
RISC
Data Bus Width
10 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
1024 B
Interface Type
SPI, I2C
Maximum Clock Frequency
32 KHZ
Number Of Programmable I/os
15
Number Of Timers
3
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-28
Operating Temperature Range
- 40 C to + 125 C
Processor To Be Evaluated
PIC16F1847
Supply Current (max)
34 uA
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
8.5.7
The PIR2 register contains the interrupt flag bits, as
shown in
REGISTER 8-7:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
R/W-0/0
OSFIF
Register
PIR2 REGISTER
OSFIF: Oscillator Fail Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
C2IF: Comparator C2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
C1IF: Comparator C1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
EEIF: EEPROM Write Completion Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
BCL1IF: MSSP1 Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
CCP2IF: CCP2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
8-7.
R/W-0/0
C2IF
PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
C1IF
R/W-0/0
EEIF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
BCL1IF
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
U-0
PIC16(L)F1847
software
should
U-0
DS41453B-page 95
ensure
R/W-0/0
CCP2IF
bit 0
the

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