PIC16LF1847-E/MV Microchip Technology, PIC16LF1847-E/MV Datasheet - Page 143
![14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan](/photos/16/12/161255/qfn28_sml.jpg)
PIC16LF1847-E/MV
Manufacturer Part Number
PIC16LF1847-E/MV
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F1847-EP.pdf
(408 pages)
Specifications of PIC16LF1847-E/MV
Processor Series
PIC16LF
Core
RISC
Data Bus Width
10 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
1024 B
Interface Type
SPI, I2C
Maximum Clock Frequency
32 KHZ
Number Of Programmable I/os
15
Number Of Timers
3
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-28
Operating Temperature Range
- 40 C to + 125 C
Processor To Be Evaluated
PIC16F1847
Supply Current (max)
34 uA
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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16.2
16.2.1
To enable the ADC module, the ADON bit of the
ADCON0 register must be set to a ‘1’. Setting the GO/
DONE bit of the ADCON0 register to a ‘1’ will start the
Analog-to-Digital conversion.
16.2.2
When the conversion is complete, the ADC module will:
• Clear the GO/DONE bit
• Set the ADIF Interrupt Flag bit
• Update the ADRESH and ADRESL registers with
16.2.3
If a conversion must be terminated before completion,
the GO/DONE bit can be cleared in software. The
ADRESH and ADRESL registers will be updated with
the partially complete Analog-to-Digital conversion
sample. Incomplete bits will match the last bit
converted.
2011 Microchip Technology Inc.
Note:
new conversion result
Note:
ADC Operation
COMPLETION OF A CONVERSION
STARTING A CONVERSION
The GO/DONE bit should not be set in the
same instruction that turns on the ADC.
Refer to
sion
TERMINATING A CONVERSION
A device Reset forces all registers to their
Reset state. Thus, the ADC module is
turned off and any pending conversion is
terminated.
Procedure”.
Section 16.2.6 “A/D Conver-
Preliminary
16.2.4
The ADC module can operate during Sleep. This
requires the ADC clock source to be set to the F
option. When the F
ADC waits one additional instruction before starting the
conversion. This allows the SLEEP instruction to be
executed, which can reduce system noise during the
conversion. If the ADC interrupt is enabled, the device
will wake-up from Sleep when the conversion
completes. If the ADC interrupt is disabled, the ADC
module is turned off after the conversion completes,
although the ADON bit remains set.
When the ADC clock source is something other than
F
sion to be aborted and the ADC module is turned off,
although the ADON bit remains set.
16.2.5
The Special Event Trigger of the CCPx/ECCPX module
allows periodic ADC measurements without software
intervention. When this trigger occurs, the GO/DONE
bit is set by hardware and the Timer1 counter resets to
zero.
TABLE 16-2:
Using the Special Event Trigger does not assure proper
ADC timing. It is the user’s responsibility to ensure that
the ADC timing requirements are met.
Refer
Modules”
RC
, a SLEEP instruction causes the present conver-
PIC16F/LF1847
to
Device
for more information.
ADC OPERATION DURING SLEEP
SPECIAL EVENT TRIGGER
Section 24.0
PIC16(L)F1847
SPECIAL EVENT TRIGGER
RC
clock source is selected, the
“Capture/Compare/PWM
DS41453B-page 143
CCPx
CCP4
RC
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