PIC16LF1847-E/MV Microchip Technology, PIC16LF1847-E/MV Datasheet - Page 228
![14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan](/photos/16/12/161255/qfn28_sml.jpg)
PIC16LF1847-E/MV
Manufacturer Part Number
PIC16LF1847-E/MV
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F1847-EP.pdf
(408 pages)
Specifications of PIC16LF1847-E/MV
Processor Series
PIC16LF
Core
RISC
Data Bus Width
10 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
1024 B
Interface Type
SPI, I2C
Maximum Clock Frequency
32 KHZ
Number Of Programmable I/os
15
Number Of Timers
3
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-28
Operating Temperature Range
- 40 C to + 125 C
Processor To Be Evaluated
PIC16F1847
Supply Current (max)
34 uA
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
- Current page: 228 of 408
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PIC16(L)F1847
REGISTER 24-1:
DS41453B-page 228
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-4
bit 3-0
Note 1:
R/W-00
PxM<1:0>
These bits are not implemented on CCP<4:3>.
PxM<1:0>: Enhanced PWM Output Configuration bits
Capture mode:
Unused
Compare mode:
Unused
If CCPxM<3:2> = 00, 01, 10:
xx =
If CCPxM<3:2> = 11:
00 =
01 =
10 =
11 =
DCxB<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: ECCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCPx module)
0001 = Reserved
0010 = Compare mode: toggle output on match
0011 = Reserved
0100 = Capture mode: every falling edge
0101 = Capture mode: every rising edge
0110 = Capture mode: every 4th rising edge
0111 = Capture mode: every 16th rising edge
1000 = Compare mode: initialize ECCPx pin low; set output on compare match (set CCPxIF)
1001 = Compare mode: initialize ECCPx pin high; clear output on compare match (set CCPxIF)
1010 = Compare mode: generate software interrupt only; ECCPx pin reverts to I/O state
1011 = Compare mode: Special Event Trigger (ECCPx resets TMR1 or TMR3, sets CCPxIF bit, ECCP2 trigger
CCP Modules only:
11xx =
ECCP Modules only:
1100 = PWM mode: PxA, PxC active-high; PxB, PxD active-high
1101 = PWM mode: PxA, PxC active-high; PxB, PxD active-low
1110 = PWM mode: PxA, PxC active-low; PxB, PxD active-high
1111 = PWM mode: PxA, PxC active-low; PxB, PxD active-low
(1)
R/W-0/0
CCPxCON: CCPx CONTROL REGISTER
PxA assigned as Capture/Compare input; PxB, PxC, PxD assigned as port pins
Single output; PxA modulated; PxB, PxC, PxD assigned as port pins
Full-Bridge output forward; PxD modulated; PxA active; PxB, PxC inactive
Half-Bridge output; PxA, PxB modulated with dead-band control; PxC, PxD assigned as port pins
Full-Bridge output reverse; PxB modulated; PxC active; PxA, PxD inactive
also starts A/D conversion if A/D module is enabled)
PWM mode
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
DCxB<1:0>
R/W-0/0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Reset
R/W-0/0
(1)
(1)
R/W-0/0
CCPxM<3:0>
2011 Microchip Technology Inc.
R/W-0/0
R/W-0/0
bit 0
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