MAX11043ATL+ Maxim Integrated Products, MAX11043ATL+ Datasheet - Page 3

IC ADC 16BIT W/DAC 40-TQFN-EP

MAX11043ATL+

Manufacturer Part Number
MAX11043ATL+
Description
IC ADC 16BIT W/DAC 40-TQFN-EP
Manufacturer
Maxim Integrated Products
Type
ADC, DACr
Datasheet

Specifications of MAX11043ATL+

Resolution (bits)
16 b
Sampling Rate (per Second)
9.6M
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Number Of Converters
4
Conversion Rate
1600 KSPs
Resolution
16 bit
Interface Type
SPI
Voltage Reference
2.5 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Power Dissipation
2963 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Input Voltage
3.3 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(V
V
C
OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through
a series 150Ω/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. DIFF = 1. T
(Note 1). Typical values are at T
DYNAMIC PERFORMANCE (PGA Enabled, PGA Gain = 8 x (25kHz -1dB Full-Scale Signal))
Maximum Full-Scale Input
Input-Referred Noise Spectral
Density
Second Harmonic to
Fundamental
Third Harmonic to Fundamental
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
Channel Phase Matching
DYNAMIC PERFORMANCE (PGA Enabled, PGA Gain = 16 x (25kHz -1dB Full-Scale Signal))
Maximum Full-Scale Input
Input-Referred Noise Spectral
Density
Second Harmonic to
Fundamental
Third Harmonic to Fundamental
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
Channel Phase Matching
DYNAMIC PERFORMANCE (EQ Mode (5kHz -1dB Full-Scale Signal, CONFIG_ Register Bit 3 = 1))
Maximum Full-Scale Input
Input-Referred Noise Spectral
Density
Second Harmonic to
Fundamental
Third Harmonic to Fundamental
Spurious-Free Dynamic Range
REFA
REFBP
AVDD
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
= V
= +3.0V to +3.6V, V
= C
REFB
PARAMETER
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
REFA
= V
= C
REFC
_______________________________________________________________________________________
REFB
= V
DVDD
= C
REFD
A
REFC
= +25°C.)
= +3.0V, C
= +2.5V (external reference), V
SYMBOL
= C
SFDR
SFDR
SFDR
REFD
DVREG
= C
ADC modulator gain = 1
100kHz
Unused channels are shorted and
unconnected
Between all channels, including complete
analog signal path
ADC modulator gain = 1
100kHz
Unused channels are shorted and
unconnected
Between all channels, including complete
analog signal path
ADC modulator gain = 1 (Note 2)
100kHz
Input referred (Note 3)
= 10µF, V
REFDAC
= 1µF, f
AGND
CONDITIONS
REFDAC
= V
SCLK
DGND
= V
= 38.4MHz, f
REFDACH
= 0V, common-mode input voltage = AVDD/2, V
= +1.25V (external reference), V
EXCLK
A
= T
= 38.4MHz (external clock applied to
-0.075
-0.05
MIN
-80
-77
MIN
77
to T
MAX
TYP
150
110
106
800
-92
-94
-99
-93
-90
-98
20
92
75
15
93
89
6
, unless otherwise noted
+0.075 Degrees
+0.05
MAX
REFDACL
Degrees
nV/√Hz
nV/√Hz
nV/√Hz
UNITS
REFBP
mV
mV
mV
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
= 0V,
P-P
P-P
P-P
3
=

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