SI5326C-B-GM Silicon Laboratories Inc, SI5326C-B-GM Datasheet - Page 31

IC ANY-RATE MULTI/ATTEN 36QFN

SI5326C-B-GM

Manufacturer Part Number
SI5326C-B-GM
Description
IC ANY-RATE MULTI/ATTEN 36QFN
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheets

Specifications of SI5326C-B-GM

Number Of Circuits
1
Package / Case
36-QFN
Pll
Yes
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
346MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
1.62 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
346MHz
Maximum Input Frequency
710 MHz
Minimum Input Frequency
0.002 MHz
Output Frequency Range
0.002 MHz to 1400 MHz
Supply Voltage (max)
3.63 V
Supply Voltage (min)
1.71 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reset value = 1000 0000
Reset value = 0000 0000
Register 17.
Register 18.
Name
Name
Type
Type
6:0
7:0
Bit
Bit
Bit
Bit
7
FLAT_VALID FLAT_VALID.
FLAT [14:8]
FLAT [7:0]
FLAT_
VALID
R/W
Name
Name
D7
D7
Before writing a new FLAT[14:0] value, this bit must be set to zero, which causes the
existing FLAT[14:0] value to be held internally for use while the new value is being writ-
ten. Once the new FLAT[14:0] value is completely written, set FLAT_VALID = 1 to enable
its use.
0: Memorize existing FLAT[14:0] value and ignore intermediate register values during
write of new FLAT[14:0] value.
1: Use FLAT[14:0] value directly from registers.
FLAT [14:8].
Fine resolution control for overall device skew from input clocks to output clocks. Positive
values increase the skew. See DSPLLsim for details.
FLAT [14:0] is a 2’s complement number.
FLAT [7:0].
Fine resolution control for overall device skew from input clocks to output clocks. Positive
values increase the skew. See DSPLLsim for details.
FLAT [14:0] is a 2’s complement number.
D6
D6
D5
D5
Rev. 1.0
D4
D4
FLAT [7:0]
R/W
FLAT [14:8]
Function
Function
R/W
D3
D3
D2
D2
D1
D1
Si5326
D0
D0
31

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