ICS853S12AKILF IDT, Integrated Device Technology Inc, ICS853S12AKILF Datasheet - Page 7

IC FANOUT BUFFER LVPECL 32-VFQFN

ICS853S12AKILF

Manufacturer Part Number
ICS853S12AKILF
Description
IC FANOUT BUFFER LVPECL 32-VFQFN
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of ICS853S12AKILF

Number Of Circuits
1
Ratio - Input:output
1:12
Differential - Input:output
Yes/Yes
Input
CML, LVPECL, SSTL
Output
LVPECL
Frequency - Max
1.5GHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN
Frequency-max
1.5GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1177
853S12AKILF

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W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
R
O
LVPECL O
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
IDT
ECOMMENDATIONS FOR
UTPUTS
ICS853S12I
LOW SKEW, 1-TO-12, DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
IRING THE
/ ICS
:
LVPECL FANOUT BUFFER
UTPUTS
D
IFFERENTIAL
:
U
NUSED
I
NPUT TO
F
IGURE
O
UTPUT
A
Single Ended Clock Input
CCEPT
1. S
A
PPLICATION
P
INGLE
INS
S
INGLE
E
C1
0.1u
NDED
CC
/2 is
E
V_REF
S
NDED
IGNAL
7
I
L
NFORMATION
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
D
EVELS
R1
1K
R2
1K
RIVING
V
CC
PCLK
nPCLK
D
IFFERENTIAL
I
NPUT
ICS853S12AKI REV. A MAY 21, 2008
CC
= 3.3V, V_REF should be 1.25V

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