FPD85310VJD National Semiconductor, FPD85310VJD Datasheet - Page 26

• Manufacturer Part Number: FPD85310VJD
• Description: IC CTRLR PANEL TIMING 100-TQFP
• Manufacturer: National Semiconductor
• Type: Panel Timing Controllerr

Specifications of FPD85310VJD

• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Frequency-max: -
• Output: -
• Input: -
• Other names: *FPD85310VJD

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APPENDIX A: GPO Programming
Examples
GPO Programming Example #2:
Generate a control signal which transitions low 20 output
clocks after the beginning of each output line, has a pulse-
width (low) of 12 µs, and goes high during horizontal blank-
ing. This control signal is used as an output enable for the
gate drivers.
Control is active beginning at line 2 and remains active for
768 lines.
GPO Vertical Start Register = 2
GPO Vertical Duration Register = 768d (300h)
Negative pulse goes low each line at output clock 20 corre-
sponding to when the 39/40 pixels are output on OR, OG,
OB, ER, EG, EB. Pulse remains low for 390 output clocks
(390 x 30.8 ns/clock = 12 µs). (Dual Bus output clock =
32.5 MHz for 65 MHz XGA video, 1024 pixels/line, 768 lines/
frame).
Note: 6 counts are added to the output clock # because the GPO start count
GPO Horizontal Start Register = 26d (1ah)
GPO Horizontal Duration Register = 390d (186h)
The control pulses are negative (bit [0] = 1) and the toggle
circuitry is disabled (bit1 [1] = 0).
GPO Control Register = 1
begins 6 clocks prior to the output data.
(Continued)
26
Horizontal time (clocks/line) = 1300 dot clocks
Vertical period (lines/frame) = 850 lines
DS101086-24