ICS9DB803DFLF IDT, Integrated Device Technology Inc, ICS9DB803DFLF Datasheet - Page 13

• Manufacturer Part Number: ICS9DB803DFLF
• Description: IC BUFFER 8OUTPUT DIFF 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Bufferr
• Series: -r

Specifications of ICS9DB803DFLF

• Input: HCSL
• Output: HCSL, LVDS
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Frequency-max: 400MHz
• Number Of Elements: 1
• Supply Current: 200mA
• Pll Input Freq (min): 50MHz
• Pll Input Freq (max): 110MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: SSOP
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 9DB803DFLF

How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
IDT
ICS9DB803D
Eight Output Differential Buffer for PCIe for Gen 2
Byte N + X -1
TM
WR
P
T
/ICS
Beginning Byte N
Data Byte Count = X
Index Block Write Operation
Slave Address DC
Beginning Byte = N
Byte N + X - 1
Controller (Host)
TM
Eight Output Differential Buffer for PCIe Gen 2
General SMBus serial interface information for the ICS9DB803D
starT bit
stoP bit
WRite
(h)
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(h)
13
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address DD
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RD
RT
N
P
T
Index Block Read Operation
Slave Address DC
Beginning Byte = N
Slave Address DD
Controller (Host)
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(h)
(h)
.
ICS9DB803D
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
REV J 01/27/11
(h)
(h)
(h)