IDTCSPU877DBVG8 IDT, Integrated Device Technology Inc, IDTCSPU877DBVG8 Datasheet
IDTCSPU877DBVG8
Specifications of IDTCSPU877DBVG8
Available stocks
Related parts for IDTCSPU877DBVG8
IDTCSPU877DBVG8 Summary of contents
Page 1
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER FEATURES: • differential clock distribution • Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications • Operating frequency: 125MHz to 340MHz • Very low skew: ≤ ≤ ...
Page 2
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER PIN CONFIGURATION GND GND GND GND BALL ...
Page 3
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER PIN CONFIGURATION 1 V DDQ CLK CLK 5 GND V 6 DDQ AGND DDQ 10 GND MLF TOP VIEW ...
Page 4
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER PIN DESCRIPTION (VFBGA) Pin Name AGND AV DD CLK, CLK FBIN, FBIN FBOUT, FBOUT GND B2 - B5, C2, C5, H2, H5 D4, E2, E5, F2, ...
Page 5
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER FUNCTION TABLE (1,2) INPUTS GND H X GND H X GND L H GND L L 1.8V (nom 1.8V (nom 1.8V (nom ...
Page 6
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TIMING REQUIREMENTS Symbol Parameter (1,2,3) f Operating Clock Frequency CLK (1,3,4) Application Clock Frequency t Input Clock Duty Cycle DC (5) t Stabilization Time L NOTES: 1. The PLL will track a ...
Page 7
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS V DDQ CSPU877D GND V /2 DDQ Z = 60Ω 2.97" 60Ω 2.97" CSPU877D V /2 DDQ Z = 60Ω L ...
Page 8
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS Yx, FBOUT Yx, FBOUT CLK CLK FBIN FBIN Yx Yx Yx, FBOUT Yx, FBOUT t t cycle n cycle n jit(cc) cycle n ...
Page 9
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT NOTE Average input frequency measured at CLK / CLK Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT ...
Page 10
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS OE Y Time Delay Between Output Enable (OE) and Clock Output (Y, Y) CLK CLK FBIN FBIN SSC OFF SSC ON t (Ø)DYN 50% ...
Page 11
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER TEST CIRCUIT AND SWITCHING WAVEFORMS 80% Clock Inputs and Outputs SLR(I/O) BEAD VIA 1Ω 0603 CARD V DDQ 4.7uF 1206 GND VIA CARD NOTES: Place all ...
Page 12
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER APPLICATION INFORMATION CLK R = 120Ω 10pF CLK R = 120Ω 10pF Feedback path CLK R = 120Ω 10pF CLK R = 120Ω 10pF ...
Page 13
IDTCSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER ORDERING INFORMATION XXXXX XX IDTCSPU Package Device Type CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 X Process Blank 0°C to +70°C (Commercial) BV Very Fine Pitch Ball Grid Array BVG ...