IDTCV133PAG IDT, Integrated Device Technology Inc, IDTCV133PAG Datasheet - Page 12

• Manufacturer Part Number: IDTCV133PAG
• Description: IC FLEXPC CLK PROGR P4 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV133PAG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV133PAG

ELECTRICAL CHARACTERISTICS - INPUT / SUPPLY / COMMON OUTPUT
PARAMETERS
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
NOTES:
1. Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet ppm frequency accuracy on PLL outputs.
2. This parameter is guaranteed by design, but not 100% production tested.
3. See TIMING DIAGRAMS for timing requirements.
IDTCV133
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Symbol
I
I
V
V
DD3.3OP
DD3.3PD
C
T
C
C
IH
IL
L
C
OUTX
V
V
I
I
STAB
I
IL1
IL2
F
OUT
PIN
_FS
IH
INX
_FS
IH
IL
IN
I
Input HIGH Voltage
Input LOW Voltage
LOW Voltage, HIGH Threshold
LOW Voltage, LOW Threshold
Input HIGH Current
Input LOW Current
Input LOW Current
Operating Supply Current
Powerdown Current
Input Frequency
Pin Inductance
Input Capacitance
Clock Stabilization
Modulation Frequency
T
T
T
T
T
T
T
DRIVE
FALL
RISE
DRIVE
DRIVE
FALL
RISE
_PD
_PD
_CPU_STOP#
_CPU_STOP#
_PD
_SRC
_CPU_STOP#
A
(3)
(2)
= 0°C to +70°C, Supply Voltage: V
(2)
Parameter
(2)
(2)
(1)
(2)
(2,3)
(3)
(2)
(2)
(2)
3.3V ± 5%
3.3V ± 5%
For FSA.B.C test_mode
For FSA.B.C test_mode
V
V
V
Full active, C
All differential pairs driven
All differential pairs tri-stated
V
Logic inputs
Output pin capacitance
XTAL_IN
XTAL_OUT
From V
Triangular modulation
SRC output enable after PCI_STOP# de-assertion
CPU output enable after PD de-assertion
Fall time of PD
Rise time of PD
CPU output enable after CPU_STOP# de-assertion
Fall time of CPU_STOP#
Rise time of CPU_STOP#
IN
IN
IN
DD
= V
= 0V, inputs with no pull-up resistors
= 0V, inputs with pull-up resistors
= 3.3V
DD
DD
DD
power-up or de-assertion of PD to first clock
= 3.3V ± 5%
L
= full load
Test Conditions
12
COMMERCIAL TEMPERATURE RANGE
V
V
SS
SS
Min.
–200
0.7
–5
–5
—
—
—
—
—
—
—
—
—
—
30
—
—
—
—
—
—
—
2
- 0.3
- 0.3
14.31818
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
V
DD
DD
Max.
0.35
400
300
0.8
1.8
—
—
70
12
—
12
33
15
10
5
7
5
6
5
5
5
5
5
+ 0.3
+ 0.3
MHz
Unit
KHz
mA
mA
µ A
µ A
µ A
nH
ms
pF
ns
us
ns
ns
us
ns
ns
V
V
V
V