IDTCV133PAG IDT, Integrated Device Technology Inc, IDTCV133PAG Datasheet - Page 20

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IDTCV133PAG

Manufacturer Part Number
IDTCV133PAG
Description
IC FLEXPC CLK PROGR P4 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
FlexPC™r
Type
PC Clockr
Datasheet

Specifications of IDTCV133PAG

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
CV133PAG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTCV133PAG
Manufacturer:
IDT
Quantity:
6 265
NOTES:
1. Each output has four corresponding control register bits; OE, PD, CPU_STOP, and “Free Running”.
2. I
3. See CONTROL REGISTERS section for bit address.
NOTES:
1. SRC output has four corresponding control register bits; OE, PD, SRC_STOP, and “Free Running”.
2. I
3. See CONTROL REGISTERS section for bit address.
TRISTATE DOT96 CLOCK CONTROL
NOTES:
1. DOT output has two corresponding control register bits; OE and PD.
2. I
3. See CONTROL REGISTERS section for bit address.
DIFFERENTIAL CLOCK TRISTATE
mode and the SRC clock is configurable to be driven or tristated during PCI_STOP# and PD mode. Each differential clock (SRC, CPU[2:0]) output can be
disabled by setting the corresponding output’s register OE bit to “0” (disable). Disabled outputs are to be tristated regardless of “CPU_STOP”, “SRC_STOP”
and “PD” register bit settings.
IDTCV133
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
To minimize power consumption, CPU[2:0] clock outputs are individually configurable through SMBus to be driven or tristated during PD and CPU_STOP#
REF
REF
REF
Signal
Signal
CPU
CPU
CPU
CPU
CPU
SRC
SRC
SRC
SRC
SRC
x 6 and I
x 6 and I
x 6 and I
REF
REF
Signal
DOT96
DOT96
DOT96
REF
Pin PD
Pin PD
x 2 is the output current in the corresponding mode.
x 2 is the output current in the corresponding mode.
x 2 is the output current in the corresponding mode.
0
0
0
1
1
0
0
0
1
1
Pin CPU_STOP#
Pin PCI_STOP#
X
X
1
0
0
1
0
0
X
X
CPU_STOPTristate Bit
PCI_STOPTristate Bit
Pin PD
1
0
0
X
X
X
0
1
X
0
1
X
X
20
PD Tristate Bit
PD Tristate Bit
X
X
X
X
X
X
0
1
0
1
PD Tristate Bit
X
0
1
Non-Stoppable Outputs
Non-Stoppable Outputs
COMMERCIAL TEMPERATURE RANGE
Driven at I
Driven at I
Running
Running
Running
Running
Running
Running
Tristate
Tristate
REF
REF
x 2
x 2
Driven at I
Running
Output
Tristate
Stoppable Outputs
Stoppable Outputs
Driven at I
Driven at I
Driven at I
Driven at I
REF
Running
Running
Tristate
Tristate
Tristate
Tristate
x 2
REF
REF
REF
REF
x 6
x 2
x 6
x 2

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