IDTCV133PAG IDT, Integrated Device Technology Inc, IDTCV133PAG Datasheet - Page 21

• Manufacturer Part Number: IDTCV133PAG
• Description: IC FLEXPC CLK PROGR P4 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV133PAG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV133PAG

LVDS AC TIMING REQUIREMENTS
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
NOTES:
1. Measured from V
2. Test configuration is Rs = 32.2Ω, Rp = 49.9Ω, 2pF.
3. Measurement taken from single-ended waveform.
4. Measured with oscilloscope, averaging off, using Min. Max. statistics. Variation is the delta between Min. and Max.
5. Measured with oscilloscope, averaging off, the difference between the t
6. V
7. V
8. Measured at crossing point where the instantaneous voltage value of the rising edge of LVDS equals the falling edge of LVDS#.
9. This measurement refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing.
10. The crossing point must meet the absolute and relative crossing point specifications simultaniously.
11. V
12. Δ V
13. Measurement is taken from differential waveform.
14. Overshoot is defined as the absolute value of the maximum voltage.
15. Undershoot is defined as the absolute value of the minimum voltage.
IDTCV133
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
T
HIGH
LOW
CROSS
OTAL
V
V
CROSS
CROSS(ABS)
CROSS(REL)
Symbol
t
JCYC
is defined as the statistical average LOW value as obtained by using the oscilloscope V
is defined as the statistical average HIGH value as obtained by using the oscilloscope V
V
V
V
V
Δ t
Δ V
Δ t
V
d
(rel) Min. and Max. are derived using the following: V
HIGH
t
LOW
t
OVS
UDS
R
F
T3
RB
1
1
-
is defined as the total variation of all crossing voltages of Rising LVDS and Falling LVDS#. This is the maximum allowed variance in V
R
F
CYC
CROSS
OL
= 1.75V to V
A
= 0°C to +70°C
Clock Rise Time
Clock Fall Time
Clock Rise Time Variation
Clock Fall Time Variation
Rise/Fall Matching
Voltage HIGH
Voltage LOW
Crossing Voltage (abs)
Crossing Voltage (rel)
Total Variation of V
Cycle-to-Cycle Jitter
Duty Cycle
Maximum Voltage Allowed at Output (overshoot)
Minimum Voltage Allowed at Output (undershoot)
Ringback Margin
OH
=0.525V. Only valid for Rising LVDS and Falling LVDS#. Signal must be monotonic through the V
Parameter
(2,13)
(2,3,7)
(2,3,6)
(1,2,3)
(1,2,3)
(2,3)
(2,3,5)
CROSS
(2,13)
(2,3,10,11)
(2,3,8,9,10)
(2,3,4)
(2,3,4)
Over All Edges
CROSS
(rel) Min. = 0.25V + 0.5 (V
(2,3,12)
RISE
(average) of LVDS versus the t
(2,3,14)
(2,3,15)
21
HAVG
LOW
HIGH
math function.
- 0.7V), V
math function.
FALL
CROSS
(average) of LVDS#.
(rel) Max. = 0.55V + 0.5 (0.7V - V
Calc.
Min.
-150
175
175
660
250
-0.3
n/a
—
—
—
—
—
45
—
COMMERCIAL TEMPERATURE RANGE
Typ.
700
OL
—
—
—
—
—
—
—
—
—
—
—
—
—
0
to V
OH
CROSS
region for t
V
HIGH
HAVG
for any particular system.
Calc.
Max.
700
700
125
125
850
550
140
350
0.2
20
—
55
—
+ 0.3V
).
RISE
and t
FALL
Unit
mV
mV
mV
mV
%
%
ps
ps
ps
ps
ps
V
V
V
.