ML610Q422-NNNTBZ03A7 Rohm Semiconductor, ML610Q422-NNNTBZ03A7 Datasheet - Page 336

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ML610Q422-NNNTBZ03A7

Manufacturer Part Number
ML610Q422-NNNTBZ03A7
Description
MCU 8BIT 32K FLASH 22CH 120-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q422-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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26.1.3
The bias generation circuit generates LCD drive voltages (V
voltage regulator with the capacitors (C12 and C34).
When the BSON bit of the bias circuit control register (BIASCON) is set to “1”, the bias generation circuit starts operation.
Display contrast adjustment is possible in 32 steps by using the display contrast register (DSPCNT).
Figure 26-5 shows the configurations of the bias generation circuit with 1/3 bias and with 1/4 bias.
Note:
When using 1/3 bias, connect the V
Configuration of the Bias Generation Circuit
Cd
Cb
Ca
Cd
Cb
Ca
C
C
Cc
C
C
34
12
34
12
Figure 26-5 Configuration of Bias Generation Circuit
L2
pin and the V
V
V
V
V
V
C4
C3
C2
C1
C4
C3
C2
C1
V
V
V
V
V
V
V
DD
L4
L3
L2
L1
SS
DD
SS
L4
L3
L2
L1
L3
pin externally.
Regulated power
Regulated power
supply circuit
supply circuit
(1) 1/3 Bias
(2) 1/4 Bias
multiplier
multiplier
Voltage
Voltage
26 – 5
L1
to V
L4)
by multiplying the voltage (VL1) generated by the
ML610Q421/ML610Q422 User’s Manual
Display contrast adjustment
(LCN4 to LCN0)
Selection of bias circuit On
(BSON)
Selection of 1/3 bias
(BSEL)
To LCD drivers
(V
Display contrast adjustment
(LCN4 to LCN0)
Selection of bias circuit On
(BSON)
Selection of 1/4 bias
(BSEL)
To LCD drivers
(V
L1
L1
to V
to V
L4
L4)
)
Chapter 26 LCD Drivers

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