ML610Q422-NNNTBZ03A7 Rohm Semiconductor, ML610Q422-NNNTBZ03A7 Datasheet - Page 237

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ML610Q422-NNNTBZ03A7

Manufacturer Part Number
ML610Q422-NNNTBZ03A7
Description
MCU 8BIT 32K FLASH 22CH 120-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q422-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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17.3 Description of Operation
17.3.1
17.3.2
For each pin of Port 0, the setting of the Port 0 control registers 0 and 1 (P0CON0 and P0CON1) allows selection of
high-impedance input mode, input mode with a pull-down resistor, or input mode with a pull-up resistor.
High-impedance input mode is selected at system reset.
The pin level of Port 0 can be read by reading the Port 0 data register (P0D)
The Port 0 pins (P00, P01, P02, P03) can be used for P00 to P03 interrupts (P00INT to P03INT). The P00 to P03
interrupts are maskable and interrupt enable or disable can be selected. For details of interrupts, see Chapter 5,
“Interrupts”.
The P00 and P01 pins can be used as the trigger input for the capture circuit and the P02 pin can be used as the RXD0
input pin of UART0.
For the capture function and the UART function, see Chapter 8, “Capture,” and Chapter 14, “UART,” respectively.
When an interrupt edge selected with the external interrupt control register 0, 1, or 2 (EXICON0, EXICON1, or
EXICON2) occurs at a Port 0 pin, a maskable P00 (P01, P02, or P03) interrupt (P00INT, P01INT, P02INT, or P03INT).
Figure 17-2 shows the P00 to P03 interrupt generation timing in rising-edge interrupt mode, in falling-edge interrupt mode,
and in both-edge interrupt mode without sampling and the P00 to P03 interrupt generation timing in rising-edge interrupt
mode with sampling.
External Interrupt/Capture Function
Interrupt Request
Interrupt request
Interrupt request
(a) When Falling-Edge Interrupt Mode without Sampling is Selected
(b) When Rising-Edge Interrupt Mode without Sampling is Selected
SYSCLK
SYSCLK
P0n pin
P0nINT
P0n pin
P0nINT
QP0n
QP0n
17 – 7
ML610Q421/ML610Q422 User’s Manual
Chapter 17 Port 0

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