AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 76

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AMD-8132BLCT

Manufacturer Part Number
AMD-8132BLCT
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-8132BLCT

Lead Free Status / RoHS Status
Not Compliant
AMD-8132™ HyperTransport™ PCI-X
Dev[B,A]:0x20
Default: 0000 FFF0h
Dev[B,A]:0x24
Default: 0001 FFF1h
Dev[B,A]:0x28
Default: 0000 0000h
Dev[B,A]:0x2C
Default: 0000 0000h
Dev[B,A]:0x30
Default: 0000 FFFFh
76
Bits
31:20
19:16
15:4
3:0
Bits
31:20
19:16
15:4
3:0
Bits
31:0
Bits
31:0
Bits
31:16
15:0
Description
Non-Prefetchable Memory Limit Address [MEMLIM]. Address bits[31:20]. See Dev[B,A]:0x[30:1C].
Reserved.
Non-Prefetchable Memory Base Address [MEMBASE]. Address bits[31:20]. See
Dev[B,A]:0x[30:1C].
Reserved.
Description
Prefetchable Memory Limit Address [PMEMLIM]. Address bits[31:20]. See Dev[B,A]:0x[30:1C].
Read Only. Returns 0001 indicating prefetchable memory limit upper is implemented.
Prefetchable Memory Base Address [PMEMBASE]. Address bits[31:20]. See Dev[B,A]:0x[30:1C].
Read Only. Returns 0001 indicating prefetchable memory base upper is implemented.
Description
Prefetchable Memory Base Address [PMEMBASE]. Address bits[63:32]. See Dev[B,A]:0x[30:1C].
Description
Prefetchable Memory Limit Address [PMEMLIM]. Address bits[63:32]. See Dev[B,A]:0x[30:1C].
Description
IO Limit Address [IOLIM]. Address bits[31:16]. See Dev[B,A]:0x[30:1C].
IO Base Address [IOBASE]. Address bits[31:16]. See Dev[B,A]:0x[30:1C].
®
2.0 Tunnel Data Sheet
Registers
26792 Rev. 3.07 July 2005
Attribute: See Below
Attribute: Read-Write
Attribute: Read-Write
Attribute: Read-Write
Attribute: Read-Write
Chapter 3

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