AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 113

• Manufacturer Part Number: AMD-8132BLCT
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-8132BLCT

• Lead Free Status / RoHS Status: Not Compliant

26792 Rev. 3.07 July 2005
MSI Mapping Capability Block Header
Default: A800 0008h
MSI Mapping Capability Block Lower Address
Default: FEE0 0000h
MSI Mapping Capability Block Upper Address
Default: 0000 0000h
3.3
These registers are located in PCI configuration space: function 1 in the first device (device A) and function 1
in the second device (device B).
Chapter 3
Bits
31:24
23:18
17
16
15:8
7:0
Bits
31:20
19:0
Bits
31:0
• See section 3.1.2 for a description of the register naming convention.
Description
Read Only. 0xA8 indicates this is an MSI/MSI-X Mapping Capability Block.
Reserved.
A1: Reserved.
B1: Read Only. 0 indicates the MSI window may be located anywhere in 64-bit memory mapped
MSI_ENABLE. Read-Write. If this bit is a 1, PCI and PCI-X
HyperTransport™ interrupts as specified in this capability block.
Next Capabilities Pointer. Read Only (0x00). All 0s indicates this is the last capability block for this
device/function.
Capability ID. Read Only. Capability ID is 08, indicating HyperTransport™.
Description
Lower Address. Read-Write. This stores address bits 31:20 of the MSI/MSI-X address range.
Reserved.
Description
Upper Address. This stores address bits 63:32 of the MSI/MSI-X address. If the enable bit in
Dev[B,A]:0xF4[MSI_ENABLE] is set and a PCI memory write transaction or a PCI-X
memory write block matches the address created by concatenating this upper address with the lower
address (address bits 19:0 are ignored when matching these addresses), then the PCI operation is an
MSI/MSI-X and is translated to a HyperTransport™ interrupt as described in section 1.3.2.3.
space.
PCI-X
®
IOAPIC Configuration Registers
AMD-8132™ HyperTransport™ PCI-X
Registers
®
MSI/MSI-Xs are mapped to
®
Attribute: Read-Write
Attribute: See Below
Attribute: See Below
2.0 Tunnel Data Sheet
Dev[B,A]:0xFC
®
Dev[B,A]:0xF8
Dev[B,A]:0xF4
memory write or
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