ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 197

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ALXD800EEXJ2VD C3

Manufacturer Part Number
ALXD800EEXJ2VD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
CPU Core Register Descriptions
5.5.2.107 Bus Controller Debug Registers 0 through 3 MSRs
Each of these registers specifies an address that must match the physical address currently in the bus controller in order to
trigger the breakpoint. BDR7 is used to enable and specify the type of BDR0-BDR3. If a breakpoint is configured as a mem-
ory breakpoint, the address is matched on a QWORD granularity. If a breakpoint is configured as an I/O or MSR breakpoint,
the address is matched based on all 32 bits.
Bus Controller Debug Register 0 MSR (BDR0_MSR)
MSR Address
Type
Reset Value
Bus Controller Debug Register 1 MSR (BDR1_MSR)
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:32
31:0
Bit
Name
RSVD
PHYS_ADDR
00001970h
R/W
00000000_00000000h
00001971h
R/W
00000000_00000000h
Description
Reserved. (Default = 0)
Address Match Value for BDRx. (Default = 0)
BDRx_MSR Bit Descriptions
BDRx_MSR Register Map
PHYS_ADDR
RSVD
Bus Controller Debug Register 2 MSR (BDR2_MSR)
MSR Address
Type
Reset Value
Bus Controller Debug Register 3 MSR (BDR3_MSR)
MSR Address
Type
Reset Value
00001972h
R/W
00000000_00000000h
00001973h
R/W
00000000_00000000h
9
8
33234H
7
6
5
4
3
2
1
197
0

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