ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 101
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ALXD800EEXJ2VD C3
Manufacturer Part Number
ALXD800EEXJ2VD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJ2VD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJ2VD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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CPU Core Register Descriptions
AMD Geode™ LX Processors Data Book
0000133Ch
00001335h
00001336h
00001337h
00001338h
00001339h
0000133Ah
0000133Bh
00001340h
00001341h
00001343h
00001350h
00001351h
00001352h
00001353h
00001354h
00001355h
00001360h
00001361h
00001364h
00001365h
00001366h
00001367h
00001370h
00001371h
00001372h
00001373h
Address
MSR
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
Table 5-13. CPU Core Specific MSRs Summary (Continued)
Register Name
GS Segment Base/Limit MSR (GS_BASE_MSR)
LDT Segment Base/Limit MSR (LDT_BASE_MSR)
Temp Segment Base/Limit MSR
(TEMP_BASE_MSR)
TSS Segment Base/Limit MSR
(TSS_BASE_MSR)
IDT Segment Base/Limit MSR (IDT_BASE_MSR)
GDT Segment Base/Limit MSR
(GDT_BASE_MSR)
SMM Segment Base/Limit MSR
(SMM_BASE_MSR
DMM Segment Base/ Limit MSR
(DMM_BASE_MSR)
Debug Registers 1 and 0 MSR (DR1_DR0_MSR)
Debug Registers 3 and 2 MSR (DR3_DR2_MSR)
Debug Registers 7 and 6 MSR (DR6_DR7_MSR)
Extended Debug Registers 1 and 0 MSR
(XDR1_XDR0_MSR)
Extended Debug Registers 3 and 2 MSR
(XDR3_XDR2_MSR)
Extended Debug Registers 5 and 4 MSR
(XDR5_XDR4_MSR)
Extended Debug Registers 7 and 6 MSR
(XDR7_XDR6_MSR)
Extended Debug Registers 9 and 8 MSR
(XDR9_XDR8_MSR)
Extended Debug Registers 11 and 10 MSR
(XDR11_XDR10_MSR)
EX Stage Instruction Pointer MSR (EX_IP_MSR)
WB Stage Instruction Pointer MSR (WB_IP_MSR)
EX Stage Linear Instruction Pointer MSR
(EX_LIP_MSR)
WB Stage Linear Instruction Pointer MSR
(WB_LIP_MSR)
C1/C0 Linear Instruction Pointer MSR
(C1_C0_LIP_MSR)
C3/C2 Linear Instruction Pointer MSR
(C3_C2_LIP_MSR)
Floating Point Environment Code Segment
(FPENV_CS_MSR)
Floating Point Environment Instruction Pointer
(FPENV_IP_MSR)
Floating Point Environment Data Segment
(FPENV_DS_MSR)
Floating Point Environment Data Pointer
(FPENV_DP_MSR)
FFFFFFFF_00000000h
FFFFFFFF_00000000h
00000000_FFFF0000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
xxxxxxxx_xxxx0000h
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
xxxxxxxx_xxxxxxxxh
Reset Value
33234H
Reference
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